diff options
| author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2007-02-09 12:16:24 +0900 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-20 01:26:42 +0000 |
| commit | 0cfd5267476ce8051c4447988d2b0377d09188e8 (patch) | |
| tree | f4873136c4bf0f90eec7e9b3998ba11ac98d56d3 /arch/mips | |
| parent | e03b526932a9ae1ff20b47459c040f3c6407f625 (diff) | |
[MIPS] Cobalt: Fix UART I/O type
The Cobalt UART is actually connected to memory resource area.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/cobalt/setup.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index a4b69b543bd..415ff8710b5 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c @@ -130,7 +130,7 @@ void __init plat_mem_setup(void) set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); - /* I/O port resource must include UART and LCD/buttons */ + /* I/O port resource must include LCD/buttons */ ioport_resource.end = 0x0fffffff; /* request I/O space for devices used on all i[345]86 PCs */ @@ -149,24 +149,24 @@ void __init plat_mem_setup(void) register_pci_controller(&cobalt_pci_controller); #endif -#ifdef CONFIG_SERIAL_8250 if (cobalt_board_id > COBALT_BRD_ID_RAQ1) { - #ifdef CONFIG_EARLY_PRINTK cobalt_early_console(); #endif +#ifdef CONFIG_SERIAL_8250 uart.line = 0; uart.type = PORT_UNKNOWN; uart.uartclk = 18432000; uart.irq = COBALT_SERIAL_IRQ; - uart.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - uart.iobase = 0xc800000; - uart.iotype = UPIO_PORT; + uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | + UPF_SKIP_TEST; + uart.iotype = UPIO_MEM; + uart.mapbase = 0x1c800000; early_serial_setup(&uart); - } #endif + } } /* |