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authorAkira Takeuchi <takeuchi.akr@jp.panasonic.com>2010-10-27 17:28:51 +0100
committerDavid Howells <dhowells@redhat.com>2010-10-27 17:28:51 +0100
commit965ea4bbb9ae926358273368144ba838c561bc38 (patch)
treec6ee08f2f2970bb500ccc7cf58de6beea870e4f8 /arch/mn10300/include/asm/mmu_context.h
parentdccbf4853a31a3f774f38c402209d23388d99f52 (diff)
MN10300: SMP TLB flushing
Implement global TLB flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch/mn10300/include/asm/mmu_context.h')
-rw-r--r--arch/mn10300/include/asm/mmu_context.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/mn10300/include/asm/mmu_context.h b/arch/mn10300/include/asm/mmu_context.h
index 5fb3648968a..c8f6c82672a 100644
--- a/arch/mn10300/include/asm/mmu_context.h
+++ b/arch/mn10300/include/asm/mmu_context.h
@@ -36,6 +36,22 @@
#define enter_lazy_tlb(mm, tsk) do {} while (0)
+static inline void cpu_ran_vm(int cpu, struct mm_struct *mm)
+{
+#ifdef CONFIG_SMP
+ cpumask_set_cpu(cpu, mm_cpumask(mm));
+#endif
+}
+
+static inline bool cpu_maybe_ran_vm(int cpu, struct mm_struct *mm)
+{
+#ifdef CONFIG_SMP
+ return cpumask_test_and_set_cpu(cpu, mm_cpumask(mm));
+#else
+ return true;
+#endif
+}
+
#ifdef CONFIG_MN10300_TLB_USE_PIDR
extern unsigned long mmu_context_cache[NR_CPUS];
#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
@@ -127,7 +143,13 @@ static inline void activate_context(struct mm_struct *mm)
static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
struct task_struct *tsk)
{
+ int cpu = smp_processor_id();
+
if (prev != next) {
+#ifdef CONFIG_SMP
+ per_cpu(cpu_tlbstate, cpu).active_mm = next;
+#endif
+ cpu_ran_vm(cpu, next);
PTBR = (unsigned long) next->pgd;
activate_context(next);
}