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authorKumar Gala <galak@kernel.crashing.org>2011-11-04 00:48:57 -0500
committerKumar Gala <galak@kernel.crashing.org>2011-11-24 02:01:38 -0600
commit941d71c7361815c02e2b2831bbb9f06a504a3d24 (patch)
tree973976fa32a26369b7fcb59f5aa89a5a29875bc6 /arch/powerpc/boot/cuboot-warp.c
parent7f9ce7143efe1231d66a5c91e57fce55fce6728e (diff)
powerpc/85xx: Rework P2020RDB device tree
Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks. Other changes include: * Moved to specifying interrupt-parent for mpic at root * Moved to 4-cell mpic interrupt cells to support MPIC timers * Reworked PCIe nodes to allow supportin IRQs for controller (errors) and moved PCI device IRQs down to virtual bridge level * Updated spi node to new espi binding specification * Renamed 'sdhci' node to 'sdhc' * Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the 'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum * Fixed wrong reg offsets for mdio nodes associated with etsec2 & * etsec3 * Dropping "fsl,p2020-IP..." from compatibles for standard blocks Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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