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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2007-12-21 15:39:32 +1100
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-12-23 13:14:35 -0600
commitbc0b4e7ffb528282df5f8ba9c7c3f60135603e9e (patch)
treee4d91d8b5655a860cbe833c1a0f5cc8fcce4476e /arch/powerpc/boot/dcr.h
parentee41eea947ebe2f1f627fafe0e429b5dcaaab944 (diff)
[POWERPC] 4xx: Add CPR0 accessors to boot wrapper
This adds macros to the boot wrapper to access the CPR registers from the boot wrappers. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot/dcr.h')
-rw-r--r--arch/powerpc/boot/dcr.h27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
index 8e7ee2a4298..f6b793573b9 100644
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -147,4 +147,31 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR,
#define DCRN_405_CPC0_CR0 0xb1
#define DCRN_405_CPC0_CR1 0xb2
+
+/* 440GX Clock control etc */
+
+
+#define DCRN_CPR0_CLKUPD 0x020
+#define DCRN_CPR0_PLLC 0x040
+#define DCRN_CPR0_PLLD 0x060
+#define DCRN_CPR0_PRIMAD 0x080
+#define DCRN_CPR0_PRIMBD 0x0a0
+#define DCRN_CPR0_OPBD 0x0c0
+#define DCRN_CPR0_PERD 0x0e0
+#define DCRN_CPR0_MALD 0x100
+
+/* CPRs read/write helper macros - based off include/asm-ppc/ibm44x.h */
+
+#define DCRN_CPR0_CFGADDR 0xc
+#define DCRN_CPR0_CFGDATA 0xd
+
+#define CPR0_READ(offset) ({\
+ mtdcr(DCRN_CPR0_CFGADDR, offset); \
+ mfdcr(DCRN_CPR0_CFGDATA); })
+#define CPR0_WRITE(offset, data) ({\
+ mtdcr(DCRN_CPR0_CFGADDR, offset); \
+ mtdcr(DCRN_CPR0_CFGDATA, data); })
+
+
+
#endif /* _PPC_BOOT_DCR_H_ */