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| author | Kumar Gala <galak@kernel.crashing.org> | 2011-11-07 10:22:36 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-11-24 02:01:39 -0600 |
| commit | 03f4201bd44e7d3ca7dc26b30d4251a07c77e9f2 (patch) | |
| tree | d786c935b607b77f116e6fb0446923d93b2b97f9 /arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi | |
| parent | b9db022c62f72bc5a029f20851b012895a6ea7ca (diff) | |
powerpc/85xx: Rework P5020DS device tree
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p5020-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level
* Removed mpic interrupt-parent from sec nodes, just use top level
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi')
0 files changed, 0 insertions, 0 deletions