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authorAndy Fleming <afleming@freescale.com>2012-01-04 15:28:31 -0600
committerKumar Gala <galak@kernel.crashing.org>2012-01-04 15:33:51 -0600
commit220669495bf8b68130a8218607147c7b74c28d2b (patch)
treeaf31ad750cf3ea770084c4020e2eaa582e2393e3 /arch/powerpc/boot/dts/p2020rdb.dts
parentdabc78403fc2ad96e6fc8b53c6c6abcc02e152ee (diff)
powerpc: Add TBI PHY node to first MDIO bus
Systems which use the fsl_pq_mdio driver need to specify an address for TBI PHY transactions such that the address does not conflict with any PHYs on the bus (all transactions to that address are directed to the onboard TBI PHY). The driver used to scan for a free address if no address was specified, however this ran into issues when the PHY Lib was fixed so that all MDIO transactions were protected by a mutex. As it is, the code was meant to serve as a transitional tool until the device trees were all updated to specify the TBI address. The best fix for the mutex issue was to remove the scanning code, but it turns out some of the newer SoCs have started to omit the tbi-phy node when SGMII is not being used. As such, these devices will now fail unless we add a tbi-phy node to the first mdio controller. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/p2020rdb.dts')
-rw-r--r--arch/powerpc/boot/dts/p2020rdb.dts8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts
index fd4271296f8..26759a59171 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -203,11 +203,15 @@
phy0: ethernet-phy@0 {
interrupts = <3 1 0 0>;
reg = <0x0>;
- };
+ };
phy1: ethernet-phy@1 {
interrupts = <3 1 0 0>;
reg = <0x1>;
- };
+ };
+ tbi-phy@2 {
+ device_type = "tbi-phy";
+ reg = <0x2>;
+ };
};
mdio@25520 {