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authorKumar Gala <galak@kernel.crashing.org>2009-03-31 08:46:25 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-03-31 08:46:25 -0500
commitfe671772ab1bf5624f2c4dbe2295e6ebeb8055fc (patch)
tree281b703232b95c2009468f5c4975e97a2f7384c5 /arch/powerpc/boot/dts/sbc8560.dts
parent9310933c832719b095f82dab30c6bf4e75e937ee (diff)
powerpc/85xx: Use fsl,mpc85.. as prefix for memory ctrl & l2-cache nodes
Older devices tree's used "fsl,85.." instead of the preferred "fsl,mpc85.." for the memory controller & l2 cache controller nodes. The EDAC code is the only use of these and has been updated for some time to support both "fsl,85.." and "fsl,mpc85.." Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/sbc8560.dts')
-rw-r--r--arch/powerpc/boot/dts/sbc8560.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index b772405a9a0..c4564b81e47 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -61,14 +61,14 @@
clock-frequency = <0>;
memory-controller@2000 {
- compatible = "fsl,8560-memory-controller";
+ compatible = "fsl,mpc8560-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <0x12 0x2>;
};
L2: l2-cache-controller@20000 {
- compatible = "fsl,8560-l2-cache-controller";
+ compatible = "fsl,mpc8560-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <0x20>; // 32 bytes
cache-size = <0x40000>; // L2, 256K