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authorIngo Molnar <mingo@elte.hu>2008-07-16 13:11:29 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-16 13:11:29 +0200
commit77e442461c74068217b59b356cf18992c78ed896 (patch)
tree70f62a16bc6a81b63768279c9b40645d8f4dd4ff /arch/powerpc/boot/dts/tqm8540.dts
parentd54191b85e294c46f05a2249b1f55ae54930bcc7 (diff)
parent45158894d4d6704afbb4cefe55e5f6ca279fe12a (diff)
Merge branch 'linus' into x86/kprobes
Diffstat (limited to 'arch/powerpc/boot/dts/tqm8540.dts')
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts49
1 files changed, 46 insertions, 3 deletions
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index 1addb3ae719..e1d260b9085 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -12,8 +12,8 @@
/dts-v1/;
/ {
- model = "tqm,8540";
- compatible = "tqm,8540", "tqm,85xx";
+ model = "tqc,tqm8540";
+ compatible = "tqc,tqm8540";
#address-cells = <1>;
#size-cells = <1>;
@@ -40,6 +40,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -64,7 +65,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
@@ -89,6 +90,47 @@
};
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -177,6 +219,7 @@
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
device_type = "open-pic";
+ compatible = "chrp,open-pic";
};
};