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authorLinus Torvalds <torvalds@linux-foundation.org>2008-01-31 13:37:27 +1100
committerLinus Torvalds <torvalds@linux-foundation.org>2008-01-31 13:37:27 +1100
commit8af03e782cae1e0a0f530ddd22301cdd12cf9dc0 (patch)
treec4af13a38bd3cc1a811a37f2358491f171052070 /arch/powerpc/boot/dts/walnut.dts
parent6232665040f9a23fafd9d94d4ae8d5a2dc850f65 (diff)
parent99e139126ab2e84be67969650f92eb37c12ab5cd (diff)
Merge branch 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (454 commits) [POWERPC] Cell IOMMU fixed mapping support [POWERPC] Split out the ioid fetching/checking logic [POWERPC] Add support to cell_iommu_setup_page_tables() for multiple windows [POWERPC] Split out the IOMMU logic from cell_dma_dev_setup() [POWERPC] Split cell_iommu_setup_hardware() into two parts [POWERPC] Split out the logic that allocates struct iommus [POWERPC] Allocate the hash table under 1G on cell [POWERPC] Add set_dma_ops() to match get_dma_ops() [POWERPC] 83xx: Clean up / convert mpc83xx board DTS files to v1 format. [POWERPC] 85xx: Only invalidate TLB0 and TLB1 [POWERPC] 83xx: Fix typo in mpc837x compatible entries [POWERPC] 85xx: convert sbc85* boards to use machine_device_initcall [POWERPC] 83xx: rework platform Kconfig [POWERPC] 85xx: rework platform Kconfig [POWERPC] 86xx: Remove unused IRQ defines [POWERPC] QE: Explicitly set address-cells and size cells for muram [POWERPC] Convert StorCenter DTS file to /dts-v1/ format. [POWERPC] 86xx: Convert all 86xx DTS files to /dts-v1/ format. [PPC] Remove 85xx from arch/ppc [PPC] Remove 83xx from arch/ppc ...
Diffstat (limited to 'arch/powerpc/boot/dts/walnut.dts')
-rw-r--r--arch/powerpc/boot/dts/walnut.dts55
1 files changed, 51 insertions, 4 deletions
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts
index 754fa3960f8..dcc21b0438e 100644
--- a/arch/powerpc/boot/dts/walnut.dts
+++ b/arch/powerpc/boot/dts/walnut.dts
@@ -14,14 +14,21 @@
#size-cells = <1>;
model = "ibm,walnut";
compatible = "ibm,walnut";
- dcr-parent = <&/cpus/PowerPC,405GP@0>;
+ dcr-parent = <&/cpus/cpu@0>;
+
+ aliases {
+ ethernet0 = &EMAC;
+ serial0 = &UART0;
+ serial1 = &UART1;
+ };
cpus {
#address-cells = <1>;
#size-cells = <0>;
- PowerPC,405GP@0 {
+ cpu@0 {
device_type = "cpu";
+ model = "PowerPC,405GP";
reg = <0>;
clock-frequency = <bebc200>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
@@ -168,9 +175,10 @@
};
};
- ds1743@1,0 {
+ nvram@1,0 {
/* NVRAM and RTC */
- compatible = "ds1743";
+ compatible = "ds1743-nvram";
+ #bytes = <2000>;
reg = <1 0 2000>;
};
@@ -190,6 +198,45 @@
virtual-reg = <f0300005>;
};
};
+
+ PCI0: pci@ec000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
+ primary;
+ reg = <eec00000 8 /* Config space access */
+ eed80000 4 /* IACK */
+ eed80000 4 /* Special cycle */
+ ef480000 40>; /* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed. Chip supports a second
+ * IO range but we don't use it for now
+ */
+ ranges = <02000000 0 80000000 80000000 0 20000000
+ 01000000 0 00000000 e8000000 0 00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <42000000 0 0 0 0 80000000>;
+
+ /* Walnut has all 4 IRQ pins tied together per slot */
+ interrupt-map-mask = <f800 0 0 0>;
+ interrupt-map = <
+ /* IDSEL 1 */
+ 0800 0 0 0 &UIC0 1c 8
+
+ /* IDSEL 2 */
+ 1000 0 0 0 &UIC0 1d 8
+
+ /* IDSEL 3 */
+ 1800 0 0 0 &UIC0 1e 8
+
+ /* IDSEL 4 */
+ 2000 0 0 0 &UIC0 1f 8
+ >;
+ };
};
chosen {