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authorJimi Xenidis <jimix@pobox.com>2011-09-29 10:55:13 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-11-25 14:11:28 +1100
commitfac26ad4f9cb794c9d1032f55f40a31cb55be09a (patch)
tree6acb31ab3fbc959de6f62aa4dd6ea08c004205f4 /arch/powerpc/include/asm/mmu-book3e.h
parent9d670280908013004f173b2b86414d9b6918511b (diff)
powerpc/book3e: Add ICSWX/ACOP support to Book3e cores like A2
ICSWX is also used by the A2 processor to access coprocessors, although not all "chips" that contain A2s have coprocessors. Signed-off-by: Jimi Xenidis <jimix@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/mmu-book3e.h')
-rw-r--r--arch/powerpc/include/asm/mmu-book3e.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 0260ea5ec3c..50210b9b014 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -214,6 +214,10 @@ typedef struct {
unsigned int id;
unsigned int active;
unsigned long vdso_base;
+#ifdef CONFIG_PPC_ICSWX
+ struct spinlock *cop_lockp; /* guard cop related stuff */
+ unsigned long acop; /* mask of enabled coprocessor types */
+#endif /* CONFIG_PPC_ICSWX */
#ifdef CONFIG_PPC_MM_SLICES
u64 low_slices_psize; /* SLB page size encodings */
u64 high_slices_psize; /* 4 bits per slice for now */