diff options
| author | Michael Neuling <mikey@neuling.org> | 2013-04-30 20:17:03 +0000 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-05-02 10:36:55 +1000 |
| commit | 1ddf499e1a49e67c02b89e6565d091a0bda29a91 (patch) | |
| tree | 477d0d3ae72bdb1444993e1623b08978d63ceb45 /arch/powerpc/include/asm/reg.h | |
| parent | 1de2bd4e0c0f62c697a3b3e19bda431cf67ce20e (diff) | |
powerpc: Turn on the EBB H/FSCR bits
This turns Event Based Branching (EBB) on in the Hypervisor Facility Status and
Control Register (HFSCR) and Facility Status and Control Register (FSCR).
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/reg.h')
| -rw-r--r-- | arch/powerpc/include/asm/reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 178a8584446..93be5fb2039 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -267,9 +267,11 @@ #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ #define SPRN_FSCR 0x099 /* Facility Status & Control Register */ #define FSCR_TAR (1 << (63-55)) /* Enable Target Address Register */ +#define FSCR_EBB (1 << (63-56)) /* Enable Event Based Branching */ #define FSCR_DSCR (1 << (63-61)) /* Enable Data Stream Control Register */ #define SPRN_HFSCR 0xbe /* HV=1 Facility Status & Control Register */ #define HFSCR_TAR (1 << (63-55)) /* Enable Target Address Register */ +#define HFSCR_EBB (1 << (63-56)) /* Enable Event Based Branching */ #define HFSCR_TM (1 << (63-58)) /* Enable Transactional Memory */ #define HFSCR_PM (1 << (63-60)) /* Enable prob/priv access to PMU SPRs */ #define HFSCR_BHRB (1 << (63-59)) /* Enable Branch History Rolling Buffer*/ |