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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2007-11-07 17:17:02 +1100
committerPaul Mackerras <paulus@samba.org>2007-11-08 14:15:34 +1100
commita792e75d9b3dec3fc1dfef4a8c40674bbba44641 (patch)
tree1fe2d603c9e4ee37fafc0acc89b6e5e91ae293b6 /arch/powerpc/kernel/head_64.S
parent7e22fa4a1d9a70176e1edc4529934406e1af6054 (diff)
[POWERPC] Fix si_addr value on low level hash failures
If the low level MMU hash table insertion returns an error (which can happen in some rare circumstances when the hypervisor refuses the insertion of a PTE, typically if you try to access junk via /dev/mem), the generated signal had an incorrect si_addr value due to a bug in the assembly, which was loading it as a 32 bits quantity instead of a 64 bits quantity. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/head_64.S')
-rw-r--r--arch/powerpc/kernel/head_64.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 97c5857faf0..c34986835a4 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -904,7 +904,7 @@ handle_page_fault:
*/
12: bl .save_nvgprs
addi r3,r1,STACK_FRAME_OVERHEAD
- lwz r4,_DAR(r1)
+ ld r4,_DAR(r1)
bl .low_hash_fault
b .ret_from_except