diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-21 15:50:49 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-21 15:50:49 -0700 |
commit | 9a64388d83f6ef08dfff405a9d122e3dbcb6bf38 (patch) | |
tree | a77532ce4d6d56be6c6c7f405cd901a0184250fb /arch/powerpc/kernel/head_booke.h | |
parent | e80ab411e589e00550e2e6e5a6a02d59cc730357 (diff) | |
parent | 14b3ca4022f050f8622ed282b734ddf445464583 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (202 commits)
[POWERPC] Fix compile breakage for 64-bit UP configs
[POWERPC] Define copy_siginfo_from_user32
[POWERPC] Add compat handler for PTRACE_GETSIGINFO
[POWERPC] i2c: Fix build breakage introduced by OF helpers
[POWERPC] Optimize fls64() on 64-bit processors
[POWERPC] irqtrace support for 64-bit powerpc
[POWERPC] Stacktrace support for lockdep
[POWERPC] Move stackframe definitions to common header
[POWERPC] Fix device-tree locking vs. interrupts
[POWERPC] Make pci_bus_to_host()'s struct pci_bus * argument const
[POWERPC] Remove unused __max_memory variable
[POWERPC] Simplify xics direct/lpar irq_host setup
[POWERPC] Use pseries_setup_i8259_cascade() in pseries_mpic_init_IRQ()
[POWERPC] Turn xics_setup_8259_cascade() into a generic pseries_setup_i8259_cascade()
[POWERPC] Move xics_setup_8259_cascade() into platforms/pseries/setup.c
[POWERPC] Use asm-generic/bitops/find.h in bitops.h
[POWERPC] 83xx: mpc8315 - fix USB UTMI Host setup
[POWERPC] 85xx: Fix the size of qe muram for MPC8568E
[POWERPC] 86xx: mpc86xx_hpcn - Temporarily accept old dts node identifier.
[POWERPC] 86xx: mark functions static, other minor cleanups
...
Diffstat (limited to 'arch/powerpc/kernel/head_booke.h')
-rw-r--r-- | arch/powerpc/kernel/head_booke.h | 33 |
1 files changed, 20 insertions, 13 deletions
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h index ba9393f8e77..aefafc6330c 100644 --- a/arch/powerpc/kernel/head_booke.h +++ b/arch/powerpc/kernel/head_booke.h @@ -56,8 +56,17 @@ * is necessary since the MMU is always on, for Book-E parts, and the stacks * are offset from KERNELBASE. * + * There is some space optimization to be had here if desired. However + * to allow for a common kernel with support for debug exceptions either + * going to critical or their own debug level we aren't currently + * providing configurations that micro-optimize space usage. */ -#define BOOKE_EXCEPTION_STACK_SIZE (8192) +#ifdef CONFIG_44x +#define NUM_EXCEPTION_LVLS 2 +#else +#define NUM_EXCEPTION_LVLS 3 +#endif +#define BOOKE_EXCEPTION_STACK_SIZE (4096 * NUM_EXCEPTION_LVLS) /* CRIT_SPRG only used in critical exception handling */ #define CRIT_SPRG SPRN_SPRG2 @@ -68,7 +77,7 @@ #define CRIT_STACK_TOP (exception_stack_top) /* only on e200 for now */ -#define DEBUG_STACK_TOP (exception_stack_top - 4096) +#define DEBUG_STACK_TOP (exception_stack_top - 8192) #define DEBUG_SPRG SPRN_SPRG6W #ifdef CONFIG_SMP @@ -212,9 +221,8 @@ label: * save (and later restore) the MSR via SPRN_CSRR1, which will still have * the MSR_DE bit set. */ -#ifdef CONFIG_E200 -#define DEBUG_EXCEPTION \ - START_EXCEPTION(Debug); \ +#define DEBUG_DEBUG_EXCEPTION \ + START_EXCEPTION(DebugDebug); \ DEBUG_EXCEPTION_PROLOG; \ \ /* \ @@ -234,8 +242,8 @@ label: cmplw r12,r10; \ blt+ 2f; /* addr below exception vectors */ \ \ - lis r10,Debug@h; \ - ori r10,r10,Debug@l; \ + lis r10,DebugDebug@h; \ + ori r10,r10,DebugDebug@l; \ cmplw r12,r10; \ bgt+ 2f; /* addr above exception vectors */ \ \ @@ -265,9 +273,9 @@ label: 2: mfspr r4,SPRN_DBSR; \ addi r3,r1,STACK_FRAME_OVERHEAD; \ EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc) -#else -#define DEBUG_EXCEPTION \ - START_EXCEPTION(Debug); \ + +#define DEBUG_CRIT_EXCEPTION \ + START_EXCEPTION(DebugCrit); \ CRITICAL_EXCEPTION_PROLOG; \ \ /* \ @@ -287,8 +295,8 @@ label: cmplw r12,r10; \ blt+ 2f; /* addr below exception vectors */ \ \ - lis r10,Debug@h; \ - ori r10,r10,Debug@l; \ + lis r10,DebugCrit@h; \ + ori r10,r10,DebugCrit@l; \ cmplw r12,r10; \ bgt+ 2f; /* addr above exception vectors */ \ \ @@ -318,7 +326,6 @@ label: 2: mfspr r4,SPRN_DBSR; \ addi r3,r1,STACK_FRAME_OVERHEAD; \ EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc) -#endif #define INSTRUCTION_STORAGE_EXCEPTION \ START_EXCEPTION(InstructionStorage) \ |