diff options
| author | Becky Bruce <becky.bruce@freescale.com> | 2008-09-24 11:01:24 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-09-24 16:29:44 -0500 |
| commit | 4ee7084eb11e00eb02dc8435fd18273a61ffa9bf (patch) | |
| tree | f9f147f0293bc33e2962ac1c1aa5bbcbd9c0edce /arch/powerpc/kernel/head_fsl_booke.S | |
| parent | 9a62c05180ff55fdaa517370c6f077402820406c (diff) | |
POWERPC: Allow 32-bit hashed pgtable code to support 36-bit physical
This rearranges a bit of code, and adds support for
36-bit physical addressing for configs that use a
hashed page table. The 36b physical support is not
enabled by default on any config - it must be
explicitly enabled via the config system.
This patch *only* expands the page table code to accomodate
large physical addresses on 32-bit systems and enables the
PHYS_64BIT config option for 86xx. It does *not*
allow you to boot a board with more than about 3.5GB of
RAM - for that, SWIOTLB support is also required (and
coming soon).
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/head_fsl_booke.S')
| -rw-r--r-- | arch/powerpc/kernel/head_fsl_booke.S | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 377e0c155c9..18c0093f932 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -422,7 +422,6 @@ skpinv: addi r6,r6,1 /* Increment */ * r12 is pointer to the pte */ #ifdef CONFIG_PTE_64BIT -#define PTE_FLAGS_OFFSET 4 #define FIND_PTE \ rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \ lwzx r11, r12, r11; /* Get pgd/pmd entry */ \ @@ -431,7 +430,6 @@ skpinv: addi r6,r6,1 /* Increment */ rlwimi r12, r10, 23, 20, 28; /* Compute pte address */ \ lwz r11, 4(r12); /* Get pte entry */ #else -#define PTE_FLAGS_OFFSET 0 #define FIND_PTE \ rlwimi r11, r10, 12, 20, 29; /* Create L1 (pgdir/pmd) address */ \ lwz r11, 0(r11); /* Get L1 entry */ \ |