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authorPaul Mackerras <paulus@samba.org>2009-05-14 13:29:14 +1000
committerIngo Molnar <mingo@elte.hu>2009-05-15 16:38:55 +0200
commitef923214a4816c289e4af2d67a9ebb1a31e4ac61 (patch)
treebf850f4f53a4f8391b6b9c0335e58364668586d9 /arch/powerpc/kernel/power6-pmu.c
parent2e569d36729c8105ae066a9b105068305442cc77 (diff)
perf_counter: powerpc: use u64 for event codes internally
Although the perf_counter API allows 63-bit raw event codes, internally in the powerpc back-end we had been using 32-bit event codes. This expands them to 64 bits so that we can add bits for specifying threshold start/stop events and instruction sampling modes later. This also corrects the return value of can_go_on_limited_pmc; we were returning an event code rather than just a 0/1 value in some circumstances. That didn't particularly matter while event codes were 32-bit, but now that event codes are 64-bit it might, so this fixes it. [ Impact: extend PowerPC perfcounter interfaces from u32 to u64 ] Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <18955.36874.472452.353104@drongo.ozlabs.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/powerpc/kernel/power6-pmu.c')
-rw-r--r--arch/powerpc/kernel/power6-pmu.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/powerpc/kernel/power6-pmu.c b/arch/powerpc/kernel/power6-pmu.c
index d44049f0ae2..ab7c615c458 100644
--- a/arch/powerpc/kernel/power6-pmu.c
+++ b/arch/powerpc/kernel/power6-pmu.c
@@ -134,7 +134,7 @@ static u32 marked_bus_events[16] = {
* Returns 1 if event counts things relating to marked instructions
* and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
*/
-static int power6_marked_instr_event(unsigned int event)
+static int power6_marked_instr_event(u64 event)
{
int pmc, psel, ptype;
int bit, byte, unit;
@@ -172,7 +172,7 @@ static int power6_marked_instr_event(unsigned int event)
/*
* Assign PMC numbers and compute MMCR1 value for a set of events
*/
-static int p6_compute_mmcr(unsigned int event[], int n_ev,
+static int p6_compute_mmcr(u64 event[], int n_ev,
unsigned int hwc[], u64 mmcr[])
{
u64 mmcr1 = 0;
@@ -265,7 +265,7 @@ static int p6_compute_mmcr(unsigned int event[], int n_ev,
* 20-23, 24-27, 28-31 ditto for bytes 1, 2, 3
* 32-34 select field: nest (subunit) event selector
*/
-static int p6_get_constraint(unsigned int event, u64 *maskp, u64 *valp)
+static int p6_get_constraint(u64 event, u64 *maskp, u64 *valp)
{
int pmc, byte, sh, subunit;
u64 mask = 0, value = 0;
@@ -298,7 +298,7 @@ static int p6_get_constraint(unsigned int event, u64 *maskp, u64 *valp)
return 0;
}
-static int p6_limited_pmc_event(unsigned int event)
+static int p6_limited_pmc_event(u64 event)
{
int pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
@@ -337,7 +337,7 @@ static const unsigned int event_alternatives[][MAX_ALT] = {
* This could be made more efficient with a binary search on
* a presorted list, if necessary
*/
-static int find_alternatives_list(unsigned int event)
+static int find_alternatives_list(u64 event)
{
int i, j;
unsigned int alt;
@@ -356,12 +356,12 @@ static int find_alternatives_list(unsigned int event)
return -1;
}
-static int p6_get_alternatives(unsigned int event, unsigned int flags,
- unsigned int alt[])
+static int p6_get_alternatives(u64 event, unsigned int flags, u64 alt[])
{
int i, j, nlim;
- unsigned int aevent, psel, pmc;
+ unsigned int psel, pmc;
unsigned int nalt = 1;
+ u64 aevent;
alt[0] = event;
nlim = p6_limited_pmc_event(event);