diff options
| author | Alexander Graf <agraf@suse.de> | 2010-01-15 14:49:13 +0100 |
|---|---|---|
| committer | Marcelo Tosatti <mtosatti@redhat.com> | 2010-03-01 12:35:56 -0300 |
| commit | f7adbba1e5d464b0d449adac1eb2519be6be9728 (patch) | |
| tree | 5a7580ac34b8abfb976525b9802d860e01cc3581 /arch/powerpc/kvm/book3s_64_interrupts.S | |
| parent | 1c0006d8d131585095c4a27dbfcfb3970807a35e (diff) | |
KVM: PPC: Keep SRR1 flags around in shadow_msr
SRR1 stores more information that just the MSR value. It also stores
valuable information about the type of interrupt we received, for
example whether the storage interrupt we just got was because of a
missing htab entry or not.
We use that information to speed up the exit path.
Now if we get preempted before we can interpret the shadow_msr values,
we get into vcpu_put which then calls the MSR handler, which then sets
all the SRR1 information bits in shadow_msr to 0. Great.
So let's preserve the SRR1 specific bits in shadow_msr whenever we set
the MSR. They don't hurt.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/powerpc/kvm/book3s_64_interrupts.S')
| -rw-r--r-- | arch/powerpc/kvm/book3s_64_interrupts.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/kvm/book3s_64_interrupts.S b/arch/powerpc/kvm/book3s_64_interrupts.S index 2ff0b2137e6..c1584d0cbce 100644 --- a/arch/powerpc/kvm/book3s_64_interrupts.S +++ b/arch/powerpc/kvm/book3s_64_interrupts.S @@ -169,7 +169,7 @@ kvmppc_handler_highmem: stw r0, VCPU_LAST_INST(r7) std r3, VCPU_PC(r7) - std r4, VCPU_SHADOW_MSR(r7) + std r4, VCPU_SHADOW_SRR1(r7) std r5, VCPU_FAULT_DEAR(r7) std r6, VCPU_FAULT_DSISR(r7) |