diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2007-02-20 19:13:30 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-20 19:13:30 +0000 |
| commit | 5a84d159061d914c8dd4aa372ac6e9529c2be453 (patch) | |
| tree | 9b08af78085334af44414adafe0096276f8fe0ff /arch/powerpc/platforms/82xx | |
| parent | e80a0e6e7ccdf64575d4384cb4172860422f5b81 (diff) | |
| parent | 7d477a04a619e90ee08724e8f2d8803c6bdfcef8 (diff) | |
Merge ARM fixes
Diffstat (limited to 'arch/powerpc/platforms/82xx')
| -rw-r--r-- | arch/powerpc/platforms/82xx/mpc82xx.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/platforms/82xx/mpc82xx_ads.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/platforms/82xx/pq2ads.h | 5 |
3 files changed, 5 insertions, 4 deletions
diff --git a/arch/powerpc/platforms/82xx/mpc82xx.c b/arch/powerpc/platforms/82xx/mpc82xx.c index 0f5b30dc60d..74e7892cdfc 100644 --- a/arch/powerpc/platforms/82xx/mpc82xx.c +++ b/arch/powerpc/platforms/82xx/mpc82xx.c @@ -50,7 +50,7 @@ #include <sysdev/fsl_soc.h> #include <sysdev/cpm2_pic.h> -#include "pq2ads_pd.h" +#include "pq2ads.h" static int __init get_freq(char *name, unsigned long *val) { diff --git a/arch/powerpc/platforms/82xx/mpc82xx_ads.c b/arch/powerpc/platforms/82xx/mpc82xx_ads.c index ea880f1f0dc..7334c1a15b9 100644 --- a/arch/powerpc/platforms/82xx/mpc82xx_ads.c +++ b/arch/powerpc/platforms/82xx/mpc82xx_ads.c @@ -51,7 +51,7 @@ #include <sysdev/fsl_soc.h> #include <../sysdev/cpm2_pic.h> -#include "pq2ads_pd.h" +#include "pq2ads.h" #ifdef CONFIG_PCI static uint pci_clk_frq; diff --git a/arch/powerpc/platforms/82xx/pq2ads.h b/arch/powerpc/platforms/82xx/pq2ads.h index fb2f92bcd77..5b5cca6c8c8 100644 --- a/arch/powerpc/platforms/82xx/pq2ads.h +++ b/arch/powerpc/platforms/82xx/pq2ads.h @@ -22,6 +22,7 @@ #ifndef __MACH_ADS8260_DEFS #define __MACH_ADS8260_DEFS +#include <linux/seq_file.h> #include <asm/ppcboot.h> /* For our show_cpuinfo hooks. */ @@ -46,12 +47,12 @@ #define BCSR1_RS232_EN1 ((uint)0x02000000) /* 0 ==enable */ #define BCSR1_RS232_EN2 ((uint)0x01000000) /* 0 ==enable */ #define BCSR3_FETHIEN2 ((uint)0x10000000) /* 0 == enable*/ -#define BCSR3_FETH2_RS ((uint)0x80000000) /* 0 == reset */ +#define BCSR3_FETH2_RST ((uint)0x80000000) /* 0 == reset */ /* cpm serial driver works with constants below */ #define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET) -#define SIU_INT_SMC2i ((uint)0x05+CPM_IRQ_OFFSET) +#define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET) #define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET) #define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET) #define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET) |