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authorJason Jin <Jason.jin@freescale.com>2008-05-23 16:32:46 +0800
committerKumar Gala <galak@kernel.crashing.org>2008-06-02 14:44:24 -0500
commit34e36c1541fe70e5b3842a3278c0e7631d31f4cb (patch)
treeea713b04c0634af6b446d7c0cf0d1b2f72fa5d34 /arch/powerpc/sysdev/fsl_pci.c
parentaee1dc73b519227084d77b0b2fc972b68b4153d8 (diff)
[POWERPC] fsl: PCIe MSI support for 83xx/85xx/86xx processors.
This MSI driver can be used on 83xx/85xx/86xx board. In this driver, virtual interrupt host and chip were setup. There are 256 MSI interrupts in this host, Every 32 MSI interrupts cascaded to one IPIC/MPIC interrupt. The chip was treated as edge sensitive and some necessary functions were setup for this chip. Before using the MSI interrupt, PCI/PCIE device need to ask for a MSI interrupt in the 256 MSI interrupts. A 256bit bitmap show which MSI interrupt was used, reserve bit in the bitmap can be used to force the device use some designate MSI interrupt in the 256 MSI interrupts. Sometimes this is useful for testing the all the MSI interrupts. The msi-available-ranges property in the dts file was used for this purpose. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev/fsl_pci.c')
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index bf13c2174a4..52a5f7f41b4 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -106,6 +106,16 @@ void __init setup_pci_cmd(struct pci_controller *hose)
}
}
+#ifdef CONFIG_PCI_MSI
+void __init setup_pci_pcsrbar(struct pci_controller *hose)
+{
+ phys_addr_t immr_base;
+
+ immr_base = get_immrbase();
+ early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base);
+}
+#endif
+
static int fsl_pcie_bus_fixup;
static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
@@ -211,6 +221,10 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
/* Setup PEX window registers */
setup_pci_atmu(hose, &rsrc);
+ /* Setup PEXCSRBAR */
+#ifdef CONFIG_PCI_MSI
+ setup_pci_pcsrbar(hose);
+#endif
return 0;
}