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authorRoy Zang <tie-fei.zang@freescale.com>2007-07-10 18:47:06 +0800
committerKumar Gala <galak@kernel.crashing.org>2007-07-23 10:27:08 -0500
commit3f6c5dae277d43b4fe2dd77a5984b0ef9aee52c6 (patch)
tree9a542f1c56624351ef042708b1933439757e11e5 /arch/powerpc/sysdev/fsl_pci.c
parent344ffde71e65fb0ef4b73590015362005a59b3c0 (diff)
[POWERPC] Use Freescale pci/pcie common code for 85xx boards
Switch the 85xx platform over to using the FSL generic PCI code. This gets ups PCIe support in addition to base PCI support. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev/fsl_pci.c')
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 69d3c6eee83..2eefcde5b0d 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -200,5 +200,12 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
return 0;
}
+DECLARE_PCI_FIXUP_EARLY(0x1957, 0x0012, quirk_fsl_pcie_transparent);
+DECLARE_PCI_FIXUP_EARLY(0x1957, 0x0013, quirk_fsl_pcie_transparent);
+DECLARE_PCI_FIXUP_EARLY(0x1957, 0x0014, quirk_fsl_pcie_transparent);
+DECLARE_PCI_FIXUP_EARLY(0x1957, 0x0015, quirk_fsl_pcie_transparent);
+DECLARE_PCI_FIXUP_EARLY(0x1957, 0x0018, quirk_fsl_pcie_transparent);
+DECLARE_PCI_FIXUP_EARLY(0x1957, 0x0019, quirk_fsl_pcie_transparent);
+DECLARE_PCI_FIXUP_EARLY(0x1957, 0x001a, quirk_fsl_pcie_transparent);
DECLARE_PCI_FIXUP_EARLY(0x1957, 0x7010, quirk_fsl_pcie_transparent);
DECLARE_PCI_FIXUP_EARLY(0x1957, 0x7011, quirk_fsl_pcie_transparent);