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authorDmitry Eremin-Solenikov <dbaryshkov@gmail.com>2010-07-21 10:33:24 +0000
committerKumar Gala <galak@kernel.crashing.org>2010-08-04 14:21:41 -0500
commite9502fbe2d1e754edfb70d5738f058853097c88c (patch)
treebd9aa41510e782f85c7e9f302cb8472f4e6db3e3 /arch/powerpc
parent07c638398f490e63275ae23aa51b7c50df7d1a49 (diff)
powerpc/tqm85xx: add a quirk for ti1520 PCMCIA bridge
By default ti1520 bridge expects an input clock on CLOCK pin (to control power chip). However on this boards CLOCK should be generated by PCI1520 itself. Add a quirk that enables internal 16 KHz clock generation on this pin. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/platforms/85xx/tqm85xx.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 5b0ab9966e9..8f29bbce536 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -151,6 +151,27 @@ static void tqm85xx_show_cpuinfo(struct seq_file *m)
seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
}
+static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev)
+{
+ unsigned int val;
+
+ /* Do not do the fixup on other platforms! */
+ if (!machine_is(tqm85xx))
+ return;
+
+ dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
+
+ /*
+ * Enable P2CCLK bit in system control register
+ * to enable CLOCK output to power chip
+ */
+ pci_read_config_dword(pdev, 0x80, &val);
+ pci_write_config_dword(pdev, 0x80, val | (1 << 27));
+
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
+ tqm85xx_ti1520_fixup);
+
static struct of_device_id __initdata of_bus_ids[] = {
{ .compatible = "simple-bus", },
{ .compatible = "gianfar", },