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authorKumar Gala <galak@freescale.com>2005-06-25 14:54:37 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-25 16:24:26 -0700
commit33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3 (patch)
treee2ecb071823cc9ffe2755ed117bfabe04a35e1fc /arch/ppc/kernel/perfmon.c
parent62aa751d16399637325852bc0a1fcf13c2476dd7 (diff)
[PATCH] ppc32: Add support for Freescale e200 (Book-E) core
The e200 core is a Book-E core (similar to e500) that has a unified L1 cache and is not cache coherent on the bus. The e200 core also adds a separate exception level for debug exceptions. Part of this patch helps to cleanup a few cases that are true for all Freescale Book-E parts, not just e500. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/kernel/perfmon.c')
-rw-r--r--arch/ppc/kernel/perfmon.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ppc/kernel/perfmon.c b/arch/ppc/kernel/perfmon.c
index 918f6b252e4..fa1dad96b83 100644
--- a/arch/ppc/kernel/perfmon.c
+++ b/arch/ppc/kernel/perfmon.c
@@ -36,7 +36,7 @@
/* A lock to regulate grabbing the interrupt */
DEFINE_SPINLOCK(perfmon_lock);
-#ifdef CONFIG_FSL_BOOKE
+#if defined (CONFIG_FSL_BOOKE) && !defined (CONFIG_E200)
static void dummy_perf(struct pt_regs *regs)
{
unsigned int pmgc0 = mfpmr(PMRN_PMGC0);