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authorKumar Gala <galak@freescale.com>2005-06-21 17:15:25 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-21 18:46:24 -0700
commit65145e060b1c933ebc4215c3b493f586e08a1d5c (patch)
tree7468cf3075cbd10863886ac1bd3d0f08b25fec2d /arch/ppc/mm/pgtable.c
parenteee4146ab908188e556641f1cd7a10e894d10edb (diff)
[PATCH] ppc32: Added support for all MPC8548 internal interrupts
The MPC8548 has 48 internal interrupts and 12 external interrupts. The previous generation PowerQUICC III devices only had 32 internal and 12 external interrupts on the primary interrupt controller. Expanded the number of internal interrupts to 48 for all PowerQUICC III processors and moved the interrupt numbers for the external after the 48 internal interrupt lines, rather than putting the 12 new internal interrupts at the end and ifdef'ng the whole mess. As parted of this created a macro which represents the internal interrupt senses since they are the same on all PQ3 processors. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/mm/pgtable.c')
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