diff options
| author | Eugene Surovegin <ebs@ebshome.net> | 2005-07-29 22:59:19 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-07-30 10:14:46 -0700 |
| commit | 5ce17b18e16177dd6409dabd38df5c2c9b58fc2d (patch) | |
| tree | cbc4e6bac2af443d9c2746c260275fc0b4d9c70b /arch/ppc/platforms/4xx/ebony.h | |
| parent | e310fd43256b3cf4d37f6447b8f7413ca744657a (diff) | |
[PATCH] ppc32: fix 44x early serial debug for configurations with more than 512M of RAM
Fix 44x early serial debugging for big RAM configurations (more than 512M).
We cannot use default OpenBIOS virtual mapping, because it interferes with
pinned TLB entry.
While we are at it, move early UART mapping to TLB slot 0, so it can
survive longer during boot process (slot 1 is used by the first ioremap
call, effectively killing UART mapping if it occupies this slot). Also,
change UART TLB entry size to 4K (256M is too much for a bunch of registers
:). Squash some warnings on the way.
Tested on Ebony and Ocotea with 1G of RAM.
Thanks to Scott Coulter <scott.coulter@cyclone.com> for diagnosing this
problem.
Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/platforms/4xx/ebony.h')
| -rw-r--r-- | arch/ppc/platforms/4xx/ebony.h | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/ppc/platforms/4xx/ebony.h b/arch/ppc/platforms/4xx/ebony.h index 47c391c9174..d08faa46a0a 100644 --- a/arch/ppc/platforms/4xx/ebony.h +++ b/arch/ppc/platforms/4xx/ebony.h @@ -56,9 +56,18 @@ * Serial port defines */ -/* OpenBIOS defined UART mappings, used before early_serial_setup */ +#if defined(__BOOTER__) +/* OpenBIOS defined UART mappings, used by bootloader shim */ #define UART0_IO_BASE 0xE0000200 #define UART1_IO_BASE 0xE0000300 +#else +/* head_44x.S created UART mapping, used before early_serial_setup. + * We cannot use default OpenBIOS UART mappings because they + * don't work for configurations with more than 512M RAM. --ebs + */ +#define UART0_IO_BASE 0xF0000200 +#define UART1_IO_BASE 0xF0000300 +#endif /* external Epson SG-615P */ #define BASE_BAUD 691200 @@ -66,7 +75,7 @@ #define STD_UART_OP(num) \ { 0, BASE_BAUD, 0, UART##num##_INT, \ (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: UART##num##_IO_BASE, \ + iomem_base: (void*)UART##num##_IO_BASE, \ io_type: SERIAL_IO_MEM}, #define SERIAL_PORT_DFNS \ |