[PPC] Remove 85xx from arch/ppc

85xx exists in arch/powerpc as well as cuImage support to boot from a u-boot that doesn't support device trees. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
author: Kumar Gala <galak@kernel.crashing.org> 2008-01-27 14:06:14 -0600
committer: Kumar Gala <galak@kernel.crashing.org> 2008-01-28 08:33:10 -0600
commit: c42f3ad7f1bf17f31c3febdc71034ed6d793d40f (patch)
tree: 5a56c44717cf8fe4a5f402370506e5fbb78368e4 /arch/ppc/platforms/85xx
parent: 3155f7f23f7865e64f7eb14e226a2dff8197e51f (diff)
19 files changed, 0 insertions, 3052 deletions
diff --git a/arch/ppc/platforms/85xx/Kconfig b/arch/ppc/platforms/85xx/Kconfig
deleted file mode 100644
index 6f2d0add7de..00000000000
--- a/arch/ppc/platforms/85xx/Kconfig
+++ /dev/null
@@ -1,106 +0,0 @@
-config 85xx
-	bool
-	depends on E500
-	default y
-
-config PPC_INDIRECT_PCI_BE
-	bool
-	depends on 85xx
-	default y
-
-menu "Freescale 85xx options"
-	depends on E500
-
-choice
-	prompt "Machine Type"
-	depends on 85xx
-	default MPC8540_ADS
-
-config MPC8540_ADS
-	bool "Freescale MPC8540 ADS"
-	help
-	  This option enables support for the MPC 8540 ADS evaluation board.
-
-config MPC8548_CDS
-	bool "Freescale MPC8548 CDS"
-	help
-	  This option enables support for the MPC8548 CDS evaluation board.
-
-config MPC8555_CDS
-	bool "Freescale MPC8555 CDS"
-	help
-	  This option enables support for the MPC8555 CDS evaluation board.
-
-config MPC8560_ADS
-	bool "Freescale MPC8560 ADS"
-	help
-	  This option enables support for the MPC 8560 ADS evaluation board.
-
-config SBC8560
-	bool "WindRiver PowerQUICC III SBC8560"
-	help
-	  This option enables support for the WindRiver PowerQUICC III
-	  SBC8560 board.
-
-config STX_GP3
-	bool "Silicon Turnkey Express GP3"
-	help
-	  This option enables support for the Silicon Turnkey Express GP3
-	  board.
-
-config TQM8540
-	bool "TQ Components TQM8540"
-	help
-	  This option enables support for the TQ Components TQM8540 board.
-
-config TQM8541
-	bool "TQ Components TQM8541"
-	help
-	  This option enables support for the TQ Components TQM8541 board.
-
-config TQM8555
-	bool "TQ Components TQM8555"
-	help
-	  This option enables support for the TQ Components TQM8555 board.
-
-config TQM8560
-	bool "TQ Components TQM8560"
-	help
-	  This option enables support for the TQ Components TQM8560 board.
-
-endchoice
-
-# It's often necessary to know the specific 85xx processor type.
-# Fortunately, it is implied (so far) from the board type, so we
-# don't need to ask more redundant questions.
-config MPC8540
-	bool
-	depends on MPC8540_ADS || TQM8540
-	default y
-
-config MPC8548
-	bool
-	depends on MPC8548_CDS
-	default y
-
-config MPC8555
-	bool
-	depends on MPC8555_CDS || TQM8541 || TQM8555
-	default y
-
-config MPC8560
-	bool
-	depends on SBC8560 || MPC8560_ADS || STX_GP3 || TQM8560
-	default y
-
-config 85xx_PCI2
-	bool "Support for 2nd PCI host controller"
-	depends on MPC8555_CDS
-	default y
-
-config PPC_GEN550
-	bool
-	depends on MPC8540 || SBC8560 || MPC8555
-	default y
-
-endmenu
diff --git a/arch/ppc/platforms/85xx/Makefile b/arch/ppc/platforms/85xx/Makefile
deleted file mode 100644
index 6c4753c144d..00000000000
--- a/arch/ppc/platforms/85xx/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Makefile for the PowerPC 85xx linux kernel.
-#
-obj-$(CONFIG_MPC8540_ADS)	+= mpc85xx_ads_common.o mpc8540_ads.o
-obj-$(CONFIG_MPC8548_CDS)	+= mpc85xx_cds_common.o
-obj-$(CONFIG_MPC8555_CDS)	+= mpc85xx_cds_common.o
-obj-$(CONFIG_MPC8560_ADS)	+= mpc85xx_ads_common.o mpc8560_ads.o
-obj-$(CONFIG_SBC8560)		+= sbc85xx.o sbc8560.o
-obj-$(CONFIG_STX_GP3)		+= stx_gp3.o
-obj-$(CONFIG_TQM8540)		+= tqm85xx.o
-obj-$(CONFIG_TQM8541)		+= tqm85xx.o
-obj-$(CONFIG_TQM8555)		+= tqm85xx.o
-obj-$(CONFIG_TQM8560)		+= tqm85xx.o
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c
deleted file mode 100644
index 00a3ba57063..00000000000
--- a/arch/ppc/platforms/85xx/mpc8540_ads.c
+++ /dev/null
@@ -1,226 +0,0 @@
-/*
- * MPC8540ADS board specific routines
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/serial.h>
-#include <linux/tty.h>	/* for linux/serial_core.h */
-#include <linux/serial_core.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
-#include <linux/fsl_devices.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/open_pic.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc85xx.h>
-#include <asm/irq.h>
-#include <asm/immap_85xx.h>
-#include <asm/kgdb.h>
-#include <asm/ppc_sys.h>
-#include <mm/mmu_decl.h>
-
-#include <syslib/ppc85xx_setup.h>
-
-/* ************************************************************************
- *
- * Setup the architecture
- *
- */
-static void __init
-mpc8540ads_setup_arch(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-	unsigned int freq;
-	struct gianfar_platform_data *pdata;
-	struct gianfar_mdio_data *mdata;
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	if (ppc_md.progress)
-		ppc_md.progress("mpc8540ads_setup_arch()", 0);
-
-	/* Set loops_per_jiffy to a half-way reasonable value,
-	   for use until calibrate_delay gets called. */
-	loops_per_jiffy = freq / HZ;
-
-#ifdef CONFIG_PCI
-	/* setup PCI host bridges */
-	mpc85xx_setup_hose();
-#endif
-
-#ifdef CONFIG_SERIAL_8250
-	mpc85xx_early_serial_map();
-#endif
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-	/* Invalidate the entry we stole earlier the serial ports
-	 * should be properly mapped */
-	invalidate_tlbcam_entry(num_tlbcam_entries - 1);
-#endif
-
-	/* setup the board related info for the MDIO bus */
-	mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
-
-	mdata->irq[0] = MPC85xx_IRQ_EXT5;
-	mdata->irq[1] = MPC85xx_IRQ_EXT5;
-	mdata->irq[2] = PHY_POLL;
-	mdata->irq[3] = MPC85xx_IRQ_EXT5;
-	mdata->irq[31] = PHY_POLL;
-
-	/* setup the board related information for the enet controllers */
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 0;
-		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
-	}
-
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 1;
-		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
-	}
-
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
-	if (pdata) {
-		pdata->board_flags = 0;
-		pdata->bus_id = 0;
-		pdata->phy_id = 3;
-		memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
-	}
-
-#ifdef CONFIG_BLK_DEV_INITRD
-	if (initrd_start)
-		ROOT_DEV = Root_RAM0;
-	else
-#endif
-#ifdef  CONFIG_ROOT_NFS
-		ROOT_DEV = Root_NFS;
-#else
-		ROOT_DEV = Root_HDA1;
-#endif
-}
-
-/* ************************************************************************ */
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-	      unsigned long r6, unsigned long r7)
-{
-	/* parse_bootinfo must always be called first */
-	parse_bootinfo(find_bootinfo());
-
-	/*
-	 * If we were passed in a board information, copy it into the
-	 * residual data area.
-	 */
-	if (r3) {
-		memcpy((void *) __res, (void *) (r3 + KERNELBASE),
-		       sizeof (bd_t));
-	}
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-	{
-		bd_t *binfo = (bd_t *) __res;
-		struct uart_port p;
-
-		/* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
-		settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base,
-			  binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
-
-		memset(&p, 0, sizeof (p));
-		p.iotype = UPIO_MEM;
-		p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
-		p.uartclk = binfo->bi_busfreq;
-
-		gen550_init(0, &p);
-
-		memset(&p, 0, sizeof (p));
-		p.iotype = UPIO_MEM;
-		p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
-		p.uartclk = binfo->bi_busfreq;
-
-		gen550_init(1, &p);
-	}
-#endif
-
-#if defined(CONFIG_BLK_DEV_INITRD)
-	/*
-	 * If the init RAM disk has been configured in, and there's a valid
-	 * starting address for it, set it up.
-	 */
-	if (r4) {
-		initrd_start = r4 + KERNELBASE;
-		initrd_end = r5 + KERNELBASE;
-	}
-#endif				/* CONFIG_BLK_DEV_INITRD */
-
-	/* Copy the kernel command line arguments to a safe place. */
-
-	if (r6) {
-		*(char *) (r7 + KERNELBASE) = 0;
-		strcpy(cmd_line, (char *) (r6 + KERNELBASE));
-	}
-
-	identify_ppc_sys_by_id(mfspr(SPRN_SVR));
-
-	/* setup the PowerPC module struct */
-	ppc_md.setup_arch = mpc8540ads_setup_arch;
-	ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
-
-	ppc_md.init_IRQ = mpc85xx_ads_init_IRQ;
-	ppc_md.get_irq = openpic_get_irq;
-
-	ppc_md.restart = mpc85xx_restart;
-	ppc_md.power_off = mpc85xx_power_off;
-	ppc_md.halt = mpc85xx_halt;
-
-	ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
-
-	ppc_md.time_init = NULL;
-	ppc_md.set_rtc_time = NULL;
-	ppc_md.get_rtc_time = NULL;
-	ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
-
-#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
-	ppc_md.progress = gen550_progress;
-#endif	/* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
-#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
-	ppc_md.early_serial_map = mpc85xx_early_serial_map;
-#endif	/* CONFIG_SERIAL_8250 && CONFIG_KGDB */
-
-	if (ppc_md.progress)
-		ppc_md.progress("mpc8540ads_init(): exit", 0);
-
-	return;
-}
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.h b/arch/ppc/platforms/85xx/mpc8540_ads.h
deleted file mode 100644
index 7559f9e6fc2..00000000000
--- a/arch/ppc/platforms/85xx/mpc8540_ads.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * MPC8540ADS board definitions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef __MACH_MPC8540ADS_H__
-#define __MACH_MPC8540ADS_H__
-
-#include <linux/initrd.h>
-#include <syslib/ppc85xx_setup.h>
-#include <platforms/85xx/mpc85xx_ads_common.h>
-
-#endif /* __MACH_MPC8540ADS_H__ */
diff --git a/arch/ppc/platforms/85xx/mpc8555_cds.h b/arch/ppc/platforms/85xx/mpc8555_cds.h
deleted file mode 100644
index 4f79c372c4e..00000000000
--- a/arch/ppc/platforms/85xx/mpc8555_cds.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * MPC8555CDS board definitions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef __MACH_MPC8555CDS_H__
-#define __MACH_MPC8555CDS_H__
-
-#include <syslib/ppc85xx_setup.h>
-#include <platforms/85xx/mpc85xx_cds_common.h>
-
-#define CPM_MAP_ADDR	(CCSRBAR + MPC85xx_CPM_OFFSET)
-
-#endif /* __MACH_MPC8555CDS_H__ */
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c
deleted file mode 100644
index 3a060468dd9..00000000000
--- a/arch/ppc/platforms/85xx/mpc8560_ads.c
+++ /dev/null
@@ -1,303 +0,0 @@
-/*
- * MPC8560ADS board specific routines
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/serial.h>
-#include <linux/tty.h>	/* for linux/serial_core.h */
-#include <linux/serial_core.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
-#include <linux/fsl_devices.h>
-#include <linux/fs_enet_pd.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/open_pic.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc85xx.h>
-#include <asm/irq.h>
-#include <asm/immap_85xx.h>
-#include <asm/kgdb.h>
-#include <asm/ppc_sys.h>
-#include <asm/cpm2.h>
-#include <mm/mmu_decl.h>
-
-#include <syslib/cpm2_pic.h>
-#include <syslib/ppc85xx_common.h>
-#include <syslib/ppc85xx_setup.h>
-
-
-/* ************************************************************************
- *
- * Setup the architecture
- *
- */
-static void init_fcc_ioports(void)
-{
-	struct immap *immap;
-	struct io_port *io;
-	u32 tempval;
-
-	immap = cpm2_immr;
-
-	io = &immap->im_ioport;
-	/* FCC2/3 are on the ports B/C. */
-	tempval = in_be32(&io->iop_pdirb);
-	tempval &= ~PB2_DIRB0;
-	tempval |= PB2_DIRB1;
-	out_be32(&io->iop_pdirb, tempval);
-
-	tempval = in_be32(&io->iop_psorb);
-	tempval &= ~PB2_PSORB0;
-	tempval |= PB2_PSORB1;
-	out_be32(&io->iop_psorb, tempval);
-
-	tempval = in_be32(&io->iop_pparb);
-	tempval |= (PB2_DIRB0 | PB2_DIRB1);
-	out_be32(&io->iop_pparb, tempval);
-
-	tempval = in_be32(&io->iop_pdirb);
-	tempval &= ~PB3_DIRB0;
-	tempval |= PB3_DIRB1;
-	out_be32(&io->iop_pdirb, tempval);
-
-	tempval = in_be32(&io->iop_psorb);
-	tempval &= ~PB3_PSORB0;
-	tempval |= PB3_PSORB1;
-	out_be32(&io->iop_psorb, tempval);
-
-	tempval = in_be32(&io->iop_pparb);
-	tempval |= (PB3_DIRB0 | PB3_DIRB1);
-	out_be32(&io->iop_pparb, tempval);
-
-        tempval = in_be32(&io->iop_pdirc);
-        tempval |= PC3_DIRC1;
-        out_be32(&io->iop_pdirc, tempval);
-
-        tempval = in_be32(&io->iop_pparc);
-        tempval |= PC3_DIRC1;
-        out_be32(&io->iop_pparc, tempval);
-
-	/* Port C has clocks......  */
-	tempval = in_be32(&io->iop_psorc);
-	tempval &= ~(CLK_TRX);
-	out_be32(&io->iop_psorc, tempval);
-
-	tempval = in_be32(&io->iop_pdirc);
-	tempval &= ~(CLK_TRX);
-	out_be32(&io->iop_pdirc, tempval);
-	tempval = in_be32(&io->iop_pparc);
-	tempval |= (CLK_TRX);
-	out_be32(&io->iop_pparc, tempval);
-
-	/* Configure Serial Interface clock routing.
-	 * First,  clear all FCC bits to zero,
-	 * then set the ones we want.
-	 */
-	immap->im_cpmux.cmx_fcr &= ~(CPMUX_CLK_MASK);
-	immap->im_cpmux.cmx_fcr |= CPMUX_CLK_ROUTE;
-}
-
-static void __init
-mpc8560ads_setup_arch(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-	unsigned int freq;
-	struct gianfar_platform_data *pdata;
-	struct gianfar_mdio_data *mdata;
-	struct fs_platform_info *fpi;
-
-	cpm2_reset();
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	if (ppc_md.progress)
-		ppc_md.progress("mpc8560ads_setup_arch()", 0);
-
-	/* Set loops_per_jiffy to a half-way reasonable value,
-	   for use until calibrate_delay gets called. */
-	loops_per_jiffy = freq / HZ;
-
-#ifdef CONFIG_PCI
-	/* setup PCI host bridges */
-	mpc85xx_setup_hose();
-#endif
-
-	/* setup the board related info for the MDIO bus */
-	mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
-
-	mdata->irq[0] = MPC85xx_IRQ_EXT5;
-	mdata->irq[1] = MPC85xx_IRQ_EXT5;
-	mdata->irq[2] = PHY_POLL;
-	mdata->irq[3] = MPC85xx_IRQ_EXT5;
-	mdata->irq[31] = PHY_POLL;
-
-	/* setup the board related information for the enet controllers */
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 0;
-		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
-	}
-
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 1;
-		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
-	}
-
-	init_fcc_ioports();
-	ppc_sys_device_remove(MPC85xx_CPM_FCC1);
-
-	fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC2);
-	if (fpi) {
-		memcpy(fpi->macaddr, binfo->bi_enet2addr, 6);
-		fpi->bus_id = "0:02";
-		fpi->phy_addr = 2;
-		fpi->dpram_offset = (u32)cpm2_immr->im_dprambase;
-		fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[1];
-	}
-
-	fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC3);
-	if (fpi) {
-		memcpy(fpi->macaddr, binfo->bi_enet2addr, 6);
-		fpi->macaddr[5] += 1;
-		fpi->bus_id = "0:03";
-		fpi->phy_addr = 3;
-		fpi->dpram_offset = (u32)cpm2_immr->im_dprambase;
-		fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[2];
-	}
-
-#ifdef CONFIG_BLK_DEV_INITRD
-	if (initrd_start)
-		ROOT_DEV = Root_RAM0;
-	else
-#endif
-#ifdef  CONFIG_ROOT_NFS
-		ROOT_DEV = Root_NFS;
-#else
-		ROOT_DEV = Root_HDA1;
-#endif
-}
-
-static irqreturn_t cpm2_cascade(int irq, void *dev_id)
-{
-	while ((irq = cpm2_get_irq()) >= 0)
-		__do_IRQ(irq);
-	return IRQ_HANDLED;
-}
-
-static struct irqaction cpm2_irqaction = {
-	.handler = cpm2_cascade,
-	.flags = IRQF_DISABLED,
-	.mask = CPU_MASK_NONE,
-	.name = "cpm2_cascade",
-};
-
-static void __init
-mpc8560_ads_init_IRQ(void)
-{
-	/* Setup OpenPIC */
-	mpc85xx_ads_init_IRQ();
-
-	/* Setup CPM2 PIC */
-        cpm2_init_IRQ();
-
-	setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
-
-	return;
-}
-
-
-
-/* ************************************************************************ */
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-	      unsigned long r6, unsigned long r7)
-{
-	/* parse_bootinfo must always be called first */
-	parse_bootinfo(find_bootinfo());
-
-	/*
-	 * If we were passed in a board information, copy it into the
-	 * residual data area.
-	 */
-	if (r3) {
-		memcpy((void *) __res, (void *) (r3 + KERNELBASE),
-		       sizeof (bd_t));
-
-	}
-#if defined(CONFIG_BLK_DEV_INITRD)
-	/*
-	 * If the init RAM disk has been configured in, and there's a valid
-	 * starting address for it, set it up.
-	 */
-	if (r4) {
-		initrd_start = r4 + KERNELBASE;
-		initrd_end = r5 + KERNELBASE;
-	}
-#endif				/* CONFIG_BLK_DEV_INITRD */
-
-	/* Copy the kernel command line arguments to a safe place. */
-
-	if (r6) {
-		*(char *) (r7 + KERNELBASE) = 0;
-		strcpy(cmd_line, (char *) (r6 + KERNELBASE));
-	}
-
-	identify_ppc_sys_by_id(mfspr(SPRN_SVR));
-
-	/* setup the PowerPC module struct */
-	ppc_md.setup_arch = mpc8560ads_setup_arch;
-	ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
-
-	ppc_md.init_IRQ = mpc8560_ads_init_IRQ;
-	ppc_md.get_irq = openpic_get_irq;
-
-	ppc_md.restart = mpc85xx_restart;
-	ppc_md.power_off = mpc85xx_power_off;
-	ppc_md.halt = mpc85xx_halt;
-
-	ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
-
-	ppc_md.time_init = NULL;
-	ppc_md.set_rtc_time = NULL;
-	ppc_md.get_rtc_time = NULL;
-	ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
-
-	if (ppc_md.progress)
-		ppc_md.progress("mpc8560ads_init(): exit", 0);
-
-	return;
-}
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.h b/arch/ppc/platforms/85xx/mpc8560_ads.h
deleted file mode 100644
index 9f185ab2e01..00000000000
--- a/arch/ppc/platforms/85xx/mpc8560_ads.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * MPC8540ADS board definitions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef __MACH_MPC8560ADS_H
-#define __MACH_MPC8560ADS_H
-
-#include <syslib/ppc85xx_setup.h>
-#include <platforms/85xx/mpc85xx_ads_common.h>
-
-#define CPM_MAP_ADDR	(CCSRBAR + MPC85xx_CPM_OFFSET)
-#define PHY_INTERRUPT	MPC85xx_IRQ_EXT7
-
-#endif				/* __MACH_MPC8560ADS_H */
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
deleted file mode 100644
index 0706dca5a8e..00000000000
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * MPC85xx ADS board common routines
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/serial.h>
-#include <linux/module.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/open_pic.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc85xx.h>
-#include <asm/irq.h>
-#include <asm/immap_85xx.h>
-#include <asm/ppc_sys.h>
-
-#include <mm/mmu_decl.h>
-
-#include <platforms/85xx/mpc85xx_ads_common.h>
-
-#ifndef CONFIG_PCI
-unsigned long isa_io_base = 0;
-unsigned long isa_mem_base = 0;
-#endif
-
-extern unsigned long total_memory;	/* in mm/init */
-
-unsigned char __res[sizeof (bd_t)];
-
-/* Internal interrupts are all Level Sensitive, and Positive Polarity */
-static u_char mpc85xx_ads_openpic_initsenses[] __initdata = {
-	MPC85XX_INTERNAL_IRQ_SENSES,
-	0x0,						/* External  0: */
-#if defined(CONFIG_PCI)
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 1: PCI slot 0 */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 2: PCI slot 1 */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 3: PCI slot 2 */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 4: PCI slot 3 */
-#else
-	0x0,				/* External  1: */
-	0x0,				/* External  2: */
-	0x0,				/* External  3: */
-	0x0,				/* External  4: */
-#endif
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 5: PHY */
-	0x0,				/* External  6: */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 7: PHY */
-	0x0,				/* External  8: */
-	0x0,				/* External  9: */
-	0x0,				/* External 10: */
-	0x0,				/* External 11: */
-};
-
-/* ************************************************************************ */
-int
-mpc85xx_ads_show_cpuinfo(struct seq_file *m)
-{
-	uint pvid, svid, phid1;
-	uint memsize = total_memory;
-	bd_t *binfo = (bd_t *) __res;
-	unsigned int freq;
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	pvid = mfspr(SPRN_PVR);
-	svid = mfspr(SPRN_SVR);
-
-	seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
-	seq_printf(m, "Machine\t\t: mpc%sads\n", cur_ppc_sys_spec->ppc_sys_name);
-	seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
-	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
-	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
-
-	/* Display cpu Pll setting */
-	phid1 = mfspr(SPRN_HID1);
-	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
-
-	/* Display the amount of memory */
-	seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
-
-	return 0;
-}
-
-void __init
-mpc85xx_ads_init_IRQ(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-	/* Determine the Physical Address of the OpenPIC regs */
-	phys_addr_t OpenPIC_PAddr =
-	    binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
-	OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
-	OpenPIC_InitSenses = mpc85xx_ads_openpic_initsenses;
-	OpenPIC_NumInitSenses = sizeof (mpc85xx_ads_openpic_initsenses);
-
-	/* Skip reserved space and internal sources */
-	openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
-	/* Map PIC IRQs 0-11 */
-	openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
-
-	/* we let openpic interrupts starting from an offset, to
-	 * leave space for cascading interrupts underneath.
-	 */
-	openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
-
-	return;
-}
-
-#ifdef CONFIG_PCI
-/*
- * interrupt routing
- */
-
-int
-mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
-	static char pci_irq_table[][4] =
-	    /*
-	     * This is little evil, but works around the fact
-	     * that revA boards have IDSEL starting at 18
-	     * and others boards (older) start at 12
-	     *
-	     *      PCI IDSEL/INTPIN->INTLINE
-	     *       A      B      C      D
-	     */
-	{
-		{PIRQA, PIRQB, PIRQC, PIRQD},	/* IDSEL 2 */
-		{PIRQD, PIRQA, PIRQB, PIRQC},
-		{PIRQC, PIRQD, PIRQA, PIRQB},
-		{PIRQB, PIRQC, PIRQD, PIRQA},	/* IDSEL 5 */
-		{0, 0, 0, 0},	/* -- */
-		{0, 0, 0, 0},	/* -- */
-		{0, 0, 0, 0},	/* -- */
-		{0, 0, 0, 0},	/* -- */
-		{0, 0, 0, 0},	/* -- */
-		{0, 0, 0, 0},	/* -- */
-		{PIRQA, PIRQB, PIRQC, PIRQD},	/* IDSEL 12 */
-		{PIRQD, PIRQA, PIRQB, PIRQC},
-		{PIRQC, PIRQD, PIRQA, PIRQB},
-		{PIRQB, PIRQC, PIRQD, PIRQA},	/* IDSEL 15 */
-		{0, 0, 0, 0},	/* -- */
-		{0, 0, 0, 0},	/* -- */
-		{PIRQA, PIRQB, PIRQC, PIRQD},	/* IDSEL 18 */
-		{PIRQD, PIRQA, PIRQB, PIRQC},
-		{PIRQC, PIRQD, PIRQA, PIRQB},
-		{PIRQB, PIRQC, PIRQD, PIRQA},	/* IDSEL 21 */
-	};
-
-	const long min_idsel = 2, max_idsel = 21, irqs_per_slot = 4;
-	return PCI_IRQ_TABLE_LOOKUP;
-}
-
-int
-mpc85xx_exclude_device(u_char bus, u_char devfn)
-{
-	if (bus == 0 && PCI_SLOT(devfn) == 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	else
-		return PCIBIOS_SUCCESSFUL;
-}
-
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_RAPIDIO
-extern void mpc85xx_rio_setup(int law_start, int law_size);
-void platform_rio_init(void)
-{
-	/* 512MB RIO LAW at 0xc0000000 */
-	mpc85xx_rio_setup(0xc0000000, 0x20000000);
-}
-#endif /* CONFIG_RAPIDIO */
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
deleted file mode 100644
index c8c322fe368..00000000000
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * MPC85XX ADS common board definitions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef __MACH_MPC85XX_ADS_H__
-#define __MACH_MPC85XX_ADS_H__
-
-#include <linux/init.h>
-#include <asm/ppcboot.h>
-
-#define BOARD_CCSRBAR		((uint)0xe0000000)
-#define BCSR_ADDR		((uint)0xf8000000)
-#define BCSR_SIZE		((uint)(32 * 1024))
-
-struct seq_file;
-
-extern int mpc85xx_ads_show_cpuinfo(struct seq_file *m);
-extern void mpc85xx_ads_init_IRQ(void) __init;
-extern void mpc85xx_ads_map_io(void) __init;
-
-/* PCI interrupt controller */
-#define PIRQA		MPC85xx_IRQ_EXT1
-#define PIRQB		MPC85xx_IRQ_EXT2
-#define PIRQC		MPC85xx_IRQ_EXT3
-#define PIRQD		MPC85xx_IRQ_EXT4
-
-#define MPC85XX_PCI1_LOWER_IO	0x00000000
-#define MPC85XX_PCI1_UPPER_IO	0x00ffffff
-
-#define MPC85XX_PCI1_LOWER_MEM	0x80000000
-#define MPC85XX_PCI1_UPPER_MEM	0x9fffffff
-
-#define MPC85XX_PCI1_IO_BASE	0xe2000000
-#define MPC85XX_PCI1_MEM_OFFSET	0x00000000
-
-#define MPC85XX_PCI1_IO_SIZE	0x01000000
-
-/* FCC1 Clock Source Configuration.  These can be
- * redefined in the board specific file.
- *    Can only choose from CLK9-12 */
-#define F1_RXCLK       12
-#define F1_TXCLK       11
-
-/* FCC2 Clock Source Configuration.  These can be
- * redefined in the board specific file.
- *    Can only choose from CLK13-16 */
-#define F2_RXCLK       13
-#define F2_TXCLK       14
-
-/* FCC3 Clock Source Configuration.  These can be
- * redefined in the board specific file.
- *    Can only choose from CLK13-16 */
-#define F3_RXCLK       15
-#define F3_TXCLK       16
-
-
-#endif				/* __MACH_MPC85XX_ADS_H__ */
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
deleted file mode 100644
index 2d59eb776c9..00000000000
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
+++ /dev/null
@@ -1,601 +0,0 @@
-/*
- * MPC85xx CDS board specific routines
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor, Inc
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/serial.h>
-#include <linux/module.h>
-#include <linux/root_dev.h>
-#include <linux/initrd.h>
-#include <linux/tty.h>
-#include <linux/serial_core.h>
-#include <linux/fsl_devices.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/todc.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/open_pic.h>
-#include <asm/i8259.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc85xx.h>
-#include <asm/irq.h>
-#include <asm/immap_85xx.h>
-#include <asm/cpm2.h>
-#include <asm/ppc_sys.h>
-#include <asm/kgdb.h>
-
-#include <mm/mmu_decl.h>
-#include <syslib/cpm2_pic.h>
-#include <syslib/ppc85xx_common.h>
-#include <syslib/ppc85xx_setup.h>
-
-
-#ifndef CONFIG_PCI
-unsigned long isa_io_base = 0;
-unsigned long isa_mem_base = 0;
-#endif
-
-extern unsigned long total_memory;      /* in mm/init */
-
-unsigned char __res[sizeof (bd_t)];
-
-static int cds_pci_slot = 2;
-static volatile u8 * cadmus;
-
-/* Internal interrupts are all Level Sensitive, and Positive Polarity */
-static u_char mpc85xx_cds_openpic_initsenses[] __initdata = {
-	MPC85XX_INTERNAL_IRQ_SENSES,
-#if defined(CONFIG_PCI)
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 0: PCI1 slot */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 1: PCI1 slot */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 2: PCI1 slot */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 3: PCI1 slot */
-#else
-	0x0,						/* External  0: */
-	0x0,						/* External  1: */
-	0x0,						/* External  2: */
-	0x0,						/* External  3: */
-#endif
-	0x0,						/* External  4: */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External  5: PHY */
-	0x0,						/* External  6: */
-	0x0,						/* External  7: */
-	0x0,						/* External  8: */
-	0x0,						/* External  9: */
-	0x0,						/* External 10: */
-#if defined(CONFIG_85xx_PCI2) && defined(CONFIG_PCI)
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 11: PCI2 slot 0 */
-#else
-	0x0,						/* External 11: */
-#endif
-};
-
-/* ************************************************************************ */
-int
-mpc85xx_cds_show_cpuinfo(struct seq_file *m)
-{
-	uint pvid, svid, phid1;
-	uint memsize = total_memory;
-	bd_t *binfo = (bd_t *) __res;
-	unsigned int freq;
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	pvid = mfspr(SPRN_PVR);
-	svid = mfspr(SPRN_SVR);
-
-	seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
-	seq_printf(m, "Machine\t\t: CDS - MPC%s (%x)\n", cur_ppc_sys_spec->ppc_sys_name, cadmus[CM_VER]);
-	seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
-	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
-	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
-
-	/* Display cpu Pll setting */
-	phid1 = mfspr(SPRN_HID1);
-	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
-
-	/* Display the amount of memory */
-	seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
-
-	return 0;
-}
-
-#ifdef CONFIG_CPM2
-static irqreturn_t cpm2_cascade(int irq, void *dev_id)
-{
-	while((irq = cpm2_get_irq()) >= 0)
-		__do_IRQ(irq);
-	return IRQ_HANDLED;
-}
-
-static struct irqaction cpm2_irqaction = {
-	.handler = cpm2_cascade,
-	.flags = IRQF_DISABLED,
-	.mask = CPU_MASK_NONE,
-	.name = "cpm2_cascade",
-};
-#endif /* CONFIG_CPM2 */
-
-void __init
-mpc85xx_cds_init_IRQ(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-	int i;
-
-	/* Determine the Physical Address of the OpenPIC regs */
-	phys_addr_t OpenPIC_PAddr = binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
-	OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
-	OpenPIC_InitSenses = mpc85xx_cds_openpic_initsenses;
-	OpenPIC_NumInitSenses = sizeof (mpc85xx_cds_openpic_initsenses);
-
-	/* Skip reserved space and internal sources */
-#ifdef CONFIG_MPC8548
-	openpic_set_sources(0, 48, OpenPIC_Addr + 0x10200);
-#else
-	openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
-#endif
-	/* Map PIC IRQs 0-11 */
-	openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
-
-	/* we let openpic interrupts starting from an offset, to
-	 * leave space for cascading interrupts underneath.
-	 */
-	openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
-
-#ifdef CONFIG_PCI
-	openpic_hookup_cascade(PIRQ0A, "82c59 cascade", i8259_irq);
-
-	i8259_init(0, 0);
-#endif
-
-#ifdef CONFIG_CPM2
-	/* Setup CPM2 PIC */
-        cpm2_init_IRQ();
-
-	setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
-#endif
-
-	return;
-}
-
-#ifdef CONFIG_PCI
-/*
- * interrupt routing
- */
-int
-mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
-	struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
-
-	if (!hose->index)
-	{
-		/* Handle PCI1 interrupts */
-		char pci_irq_table[][4] =
-			/*
-			 *      PCI IDSEL/INTPIN->INTLINE
-			 *        A      B      C      D
-			 */
-
-			/* Note IRQ assignment for slots is based on which slot the elysium is
-			 * in -- in this setup elysium is in slot #2 (this PIRQA as first
-			 * interrupt on slot */
-		{
-			{ 0, 1, 2, 3 }, /* 16 - PMC */
-			{ 0, 1, 2, 3 }, /* 17 P2P (Tsi320) */
-			{ 0, 1, 2, 3 }, /* 18 - Slot 1 */
-			{ 1, 2, 3, 0 }, /* 19 - Slot 2 */
-			{ 2, 3, 0, 1 }, /* 20 - Slot 3 */
-			{ 3, 0, 1, 2 }, /* 21 - Slot 4 */
-		};
-
-		const long min_idsel = 16, max_idsel = 21, irqs_per_slot = 4;
-		int i, j;
-
-		for (i = 0; i < 6; i++)
-			for (j = 0; j < 4; j++)
-				pci_irq_table[i][j] =
-					((pci_irq_table[i][j] + 5 -
-					  cds_pci_slot) & 0x3) + PIRQ0A;
-
-		return PCI_IRQ_TABLE_LOOKUP;
-	} else {
-		/* Handle PCI2 interrupts (if we have one) */
-		char pci_irq_table[][4] =
-		{
-			/*
-			 * We only have one slot and one interrupt
-			 * going to PIRQA - PIRQD */
-			{ PIRQ1A, PIRQ1A, PIRQ1A, PIRQ1A }, /* 21 - slot 0 */
-		};
-
-		const long min_idsel = 21, max_idsel = 21, irqs_per_slot = 4;
-
-		return PCI_IRQ_TABLE_LOOKUP;
-	}
-}
-
-#define ARCADIA_HOST_BRIDGE_IDSEL	17
-#define ARCADIA_2ND_BRIDGE_IDSEL	3
-
-extern int mpc85xx_pci1_last_busno;
-
-int
-mpc85xx_exclude_device(u_char bus, u_char devfn)
-{
-	if (bus == 0 && PCI_SLOT(devfn) == 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-#ifdef CONFIG_85xx_PCI2
-	if (mpc85xx_pci1_last_busno)
-		if (bus == (mpc85xx_pci1_last_busno + 1) && PCI_SLOT(devfn) == 0)
-			return PCIBIOS_DEVICE_NOT_FOUND;
-#endif
-	/* We explicitly do not go past the Tundra 320 Bridge */
-	if ((bus == 1) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	else
-		return PCIBIOS_SUCCESSFUL;
-}
-
-void __init
-mpc85xx_cds_enable_via(struct pci_controller *hose)
-{
-	u32 pci_class;
-	u16 vid, did;
-
-	early_read_config_dword(hose, 0, 0x88, PCI_CLASS_REVISION, &pci_class);
-	if ((pci_class >> 16) != PCI_CLASS_BRIDGE_PCI)
-		return;
-
-	/* Configure P2P so that we can reach bus 1 */
-	early_write_config_byte(hose, 0, 0x88, PCI_PRIMARY_BUS, 0);
-	early_write_config_byte(hose, 0, 0x88, PCI_SECONDARY_BUS, 1);
-	early_write_config_byte(hose, 0, 0x88, PCI_SUBORDINATE_BUS, 0xff);
-
-	early_read_config_word(hose, 1, 0x10, PCI_VENDOR_ID, &vid);
-	early_read_config_word(hose, 1, 0x10, PCI_DEVICE_ID, &did);
-
-	if ((vid != PCI_VENDOR_ID_VIA) ||
-			(did != PCI_DEVICE_ID_VIA_82C686))
-		return;
-
-	/* Enable USB and IDE functions */
-	early_write_config_byte(hose, 1, 0x10, 0x48, 0x08);
-}
-
-void __init
-mpc85xx_cds_fixup_via(struct pci_controller *hose)
-{
-	u32 pci_class;
-	u16 vid, did;
-
-	early_read_config_dword(hose, 0, 0x88, PCI_CLASS_REVISION, &pci_class);
-	if ((pci_class >> 16) != PCI_CLASS_BRIDGE_PCI)
-		return;
-
-	/*
-	 * Force the backplane P2P bridge to have a window
-	 * open from 0x00000000-0x00001fff in PCI I/O space.
-	 * This allows legacy I/O (i8259, etc) on the VIA
-	 * southbridge to be accessed.
-	 */
-	early_write_config_byte(hose, 0, 0x88, PCI_IO_BASE, 0x00);
-	early_write_config_word(hose, 0, 0x88, PCI_IO_BASE_UPPER16, 0x0000);
-	early_write_config_byte(hose, 0, 0x88, PCI_IO_LIMIT, 0x10);
-	early_write_config_word(hose, 0, 0x88, PCI_IO_LIMIT_UPPER16, 0x0000);
-
-	early_read_config_word(hose, 1, 0x10, PCI_VENDOR_ID, &vid);
-	early_read_config_word(hose, 1, 0x10, PCI_DEVICE_ID, &did);
-	if ((vid != PCI_VENDOR_ID_VIA) ||
-			(did != PCI_DEVICE_ID_VIA_82C686))
-		return;
-
-	/*
-	 * Since the P2P window was forced to cover the fixed
-	 * legacy I/O addresses, it is necessary to manually
-	 * place the base addresses for the IDE and USB functions
-	 * within this window.
-	 */
-	/* Function 1, IDE */
-	early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_0, 0x1ff8);
-	early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_1, 0x1ff4);
-	early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_2, 0x1fe8);
-	early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_3, 0x1fe4);
-	early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_4, 0x1fd0);
-
-	/* Function 2, USB ports 0-1 */
-	early_write_config_dword(hose, 1, 0x12, PCI_BASE_ADDRESS_4, 0x1fa0);
-
-	/* Function 3, USB ports 2-3 */
-	early_write_config_dword(hose, 1, 0x13, PCI_BASE_ADDRESS_4, 0x1f80);
-
-	/* Function 5, Power Management */
-	early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_0, 0x1e00);
-	early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_1, 0x1dfc);
-	early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_2, 0x1df8);
-
-	/* Function 6, AC97 Interface */
-	early_write_config_dword(hose, 1, 0x16, PCI_BASE_ADDRESS_0, 0x1c00);
-}
-
-void __init
-mpc85xx_cds_pcibios_fixup(void)
-{
-        struct pci_dev *dev;
-	u_char		c;
-
-	if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
-                                        PCI_DEVICE_ID_VIA_82C586_1, NULL))) {
-                /*
-                 * U-Boot does not set the enable bits
-                 * for the IDE device. Force them on here.
-                 */
-                pci_read_config_byte(dev, 0x40, &c);
-                c |= 0x03; /* IDE: Chip Enable Bits */
-                pci_write_config_byte(dev, 0x40, c);
-
-		/*
-		 * Since only primary interface works, force the
-		 * IDE function to standard primary IDE interrupt
-		 * w/ 8259 offset
-		 */
-                dev->irq = 14;
-                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
-		pci_dev_put(dev);
-        }
-
-	/*
-	 * Force legacy USB interrupt routing
-	 */
-	if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
-                                        PCI_DEVICE_ID_VIA_82C586_2, NULL))) {
-                dev->irq = 10;
-                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10);
-
-		if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
-                                        PCI_DEVICE_ID_VIA_82C586_2, dev))) {
-	                dev->irq = 11;
-	                pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
-		}
-		pci_dev_put(dev);
-        }
-}
-#endif /* CONFIG_PCI */
-
-TODC_ALLOC();
-
-/* ************************************************************************
- *
- * Setup the architecture
- *
- */
-static void __init
-mpc85xx_cds_setup_arch(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-	unsigned int freq;
-	struct gianfar_platform_data *pdata;
-	struct gianfar_mdio_data *mdata;
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	printk("mpc85xx_cds_setup_arch\n");
-
-#ifdef CONFIG_CPM2
-	cpm2_reset();
-#endif
-
-	cadmus = ioremap(CADMUS_BASE, CADMUS_SIZE);
-	cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1;
-	printk("CDS Version = %x in PCI slot %d\n", cadmus[CM_VER], cds_pci_slot);
-
-	/* Setup TODC access */
-	TODC_INIT(TODC_TYPE_DS1743,
-			0,
-			0,
-			ioremap(CDS_RTC_ADDR, CDS_RTC_SIZE),
-			8);
-
-	/* Set loops_per_jiffy to a half-way reasonable value,
-	   for use until calibrate_delay gets called. */
-	loops_per_jiffy = freq / HZ;
-
-#ifdef CONFIG_PCI
-	/* VIA IDE configuration */
-        ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup;
-
-	/* setup PCI host bridges */
-	mpc85xx_setup_hose();
-#endif
-
-#ifdef CONFIG_SERIAL_8250
-	mpc85xx_early_serial_map();
-#endif
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-	/* Invalidate the entry we stole earlier the serial ports
-	 * should be properly mapped */
-	invalidate_tlbcam_entry(num_tlbcam_entries - 1);
-#endif
-
-	/* setup the board related info for the MDIO bus */
-	mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
-
-	mdata->irq[0] = MPC85xx_IRQ_EXT5;
-	mdata->irq[1] = MPC85xx_IRQ_EXT5;
-	mdata->irq[2] = PHY_POLL;
-	mdata->irq[3] = PHY_POLL;
-	mdata->irq[31] = PHY_POLL;
-
-	/* setup the board related information for the enet controllers */
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 0;
-		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
-	}
-
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 1;
-		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
-	}
-
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 0;
-		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
-	}
-
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 1;
-		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
-	}
-
-	ppc_sys_device_remove(MPC85xx_eTSEC3);
-	ppc_sys_device_remove(MPC85xx_eTSEC4);
-
-#ifdef CONFIG_BLK_DEV_INITRD
-	if (initrd_start)
-		ROOT_DEV = Root_RAM0;
-	else
-#endif
-#ifdef  CONFIG_ROOT_NFS
-		ROOT_DEV = Root_NFS;
-#else
-	ROOT_DEV = Root_HDA1;
-#endif
-}
-
-/* ************************************************************************ */
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-              unsigned long r6, unsigned long r7)
-{
-	/* parse_bootinfo must always be called first */
-	parse_bootinfo(find_bootinfo());
-
-	/*
-	 * If we were passed in a board information, copy it into the
-	 * residual data area.
-	 */
-	if (r3) {
-		memcpy((void *) __res, (void *) (r3 + KERNELBASE),
-				sizeof (bd_t));
-
-	}
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-	{
-		bd_t *binfo = (bd_t *) __res;
-		struct uart_port p;
-
-		/* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
-		settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base,
-				binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
-
-		memset(&p, 0, sizeof (p));
-		p.iotype = UPIO_MEM;
-		p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
-		p.uartclk = binfo->bi_busfreq;
-
-		gen550_init(0, &p);
-
-		memset(&p, 0, sizeof (p));
-		p.iotype = UPIO_MEM;
-		p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
-		p.uartclk = binfo->bi_busfreq;
-
-		gen550_init(1, &p);
-	}
-#endif
-
-#if defined(CONFIG_BLK_DEV_INITRD)
-	/*
-	 * If the init RAM disk has been configured in, and there's a valid
-	 * starting address for it, set it up.
-	 */
-	if (r4) {
-		initrd_start = r4 + KERNELBASE;
-		initrd_end = r5 + KERNELBASE;
-	}
-#endif /* CONFIG_BLK_DEV_INITRD */
-
-	/* Copy the kernel command line arguments to a safe place. */
-
-	if (r6) {
-		*(char *) (r7 + KERNELBASE) = 0;
-		strcpy(cmd_line, (char *) (r6 + KERNELBASE));
-	}
-
-	identify_ppc_sys_by_id(mfspr(SPRN_SVR));
-
-	/* setup the PowerPC module struct */
-	ppc_md.setup_arch = mpc85xx_cds_setup_arch;
-	ppc_md.show_cpuinfo = mpc85xx_cds_show_cpuinfo;
-
-	ppc_md.init_IRQ = mpc85xx_cds_init_IRQ;
-	ppc_md.get_irq = openpic_get_irq;
-
-	ppc_md.restart = mpc85xx_restart;
-	ppc_md.power_off = mpc85xx_power_off;
-	ppc_md.halt = mpc85xx_halt;
-
-	ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
-
-	ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
-
-	ppc_md.time_init = todc_time_init;
-	ppc_md.set_rtc_time = todc_set_rtc_time;
-	ppc_md.get_rtc_time = todc_get_rtc_time;
-
-	ppc_md.nvram_read_val = todc_direct_read_val;
-	ppc_md.nvram_write_val = todc_direct_write_val;
-
-#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
-	ppc_md.progress = gen550_progress;
-#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
-#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
-	ppc_md.early_serial_map = mpc85xx_early_serial_map;
-#endif	/* CONFIG_SERIAL_8250 && CONFIG_KGDB */
-
-	if (ppc_md.progress)
-		ppc_md.progress("mpc85xx_cds_init(): exit", 0);
-
-	return;
-}
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
deleted file mode 100644
index 32c5455c8b8..00000000000
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * MPC85xx CDS board definitions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2004 Freescale Semiconductor, Inc
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef __MACH_MPC85XX_CDS_H__
-#define __MACH_MPC85XX_CDS_H__
-
-#include <linux/serial.h>
-#include <asm/ppcboot.h>
-#include <linux/initrd.h>
-#include <syslib/ppc85xx_setup.h>
-
-#define BOARD_CCSRBAR           ((uint)0xe0000000)
-#define CCSRBAR_SIZE            ((uint)1024*1024)
-
-/* CADMUS info */
-#define CADMUS_BASE (0xf8004000)
-#define CADMUS_SIZE (256)
-#define CM_VER	(0)
-#define CM_CSR	(1)
-#define CM_RST	(2)
-
-/* CDS NVRAM/RTC */
-#define CDS_RTC_ADDR	(0xf8000000)
-#define CDS_RTC_SIZE	(8 * 1024)
-
-/* PCI config */
-#define PCI1_CFG_ADDR_OFFSET	(0x8000)
-#define PCI1_CFG_DATA_OFFSET	(0x8004)
-
-#define PCI2_CFG_ADDR_OFFSET	(0x9000)
-#define PCI2_CFG_DATA_OFFSET	(0x9004)
-
-/* PCI interrupt controller */
-#define PIRQ0A                   MPC85xx_IRQ_EXT0
-#define PIRQ0B                   MPC85xx_IRQ_EXT1
-#define PIRQ0C                   MPC85xx_IRQ_EXT2
-#define PIRQ0D                   MPC85xx_IRQ_EXT3
-#define PIRQ1A                   MPC85xx_IRQ_EXT11
-
-/* PCI 1 memory map */
-#define MPC85XX_PCI1_LOWER_IO        0x00000000
-#define MPC85XX_PCI1_UPPER_IO        0x00ffffff
-
-#define MPC85XX_PCI1_LOWER_MEM       0x80000000
-#define MPC85XX_PCI1_UPPER_MEM       0x9fffffff
-
-#define MPC85XX_PCI1_IO_BASE         0xe2000000
-#define MPC85XX_PCI1_MEM_OFFSET      0x00000000
-
-#define MPC85XX_PCI1_IO_SIZE         0x01000000
-
-/* PCI 2 memory map */
-/* Note: the standard PPC fixups will cause IO space to get bumped by
- * hose->io_base_virt - isa_io_base => MPC85XX_PCI1_IO_SIZE */
-#define MPC85XX_PCI2_LOWER_IO        0x00000000
-#define MPC85XX_PCI2_UPPER_IO        0x00ffffff
-
-#define MPC85XX_PCI2_LOWER_MEM       0xa0000000
-#define MPC85XX_PCI2_UPPER_MEM       0xbfffffff
-
-#define MPC85XX_PCI2_IO_BASE         0xe3000000
-#define MPC85XX_PCI2_MEM_OFFSET      0x00000000
-
-#define MPC85XX_PCI2_IO_SIZE         0x01000000
-
-#define NR_8259_INTS		     16
-#define CPM_IRQ_OFFSET		     NR_8259_INTS
-
-#endif /* __MACH_MPC85XX_CDS_H__ */
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c
deleted file mode 100644
index 3d7addbdecf..00000000000
--- a/arch/ppc/platforms/85xx/sbc8560.c
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
- * Wind River SBC8560 board specific routines
- * 
- * Maintainer: Kumar Gala
- *
- * Copyright 2004 Freescale Semiconductor Inc.
- * 
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/serial.h>
-#include <linux/tty.h>	/* for linux/serial_core.h */
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
-#include <linux/fsl_devices.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/open_pic.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc85xx.h>
-#include <asm/irq.h>
-#include <asm/immap_85xx.h>
-#include <asm/kgdb.h>
-#include <asm/ppc_sys.h>
-#include <mm/mmu_decl.h>
-
-#include <syslib/ppc85xx_common.h>
-#include <syslib/ppc85xx_setup.h>
-
-#ifdef CONFIG_SERIAL_8250
-static void __init
-sbc8560_early_serial_map(void)
-{
-        struct uart_port uart_req;
- 
-        /* Setup serial port access */
-        memset(&uart_req, 0, sizeof (uart_req));
-	uart_req.irq = MPC85xx_IRQ_EXT9;
-	uart_req.flags = STD_COM_FLAGS;
-	uart_req.uartclk = BASE_BAUD * 16;
-        uart_req.iotype = UPIO_MEM;
-        uart_req.mapbase = UARTA_ADDR;
-        uart_req.membase = ioremap(uart_req.mapbase, MPC85xx_UART0_SIZE);
-	uart_req.type = PORT_16650;
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
-        gen550_init(0, &uart_req);
-#endif
- 
-        if (early_serial_setup(&uart_req) != 0)
-                printk("Early serial init of port 0 failed\n");
- 
-        /* Assume early_serial_setup() doesn't modify uart_req */
-	uart_req.line = 1;
-        uart_req.mapbase = UARTB_ADDR;
-        uart_req.membase = ioremap(uart_req.mapbase, MPC85xx_UART1_SIZE);
-	uart_req.irq = MPC85xx_IRQ_EXT10;
- 
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
-        gen550_init(1, &uart_req);
-#endif
- 
-        if (early_serial_setup(&uart_req) != 0)
-                printk("Early serial init of port 1 failed\n");
-}
-#endif
-
-/* ************************************************************************
- *
- * Setup the architecture
- *
- */
-static void __init
-sbc8560_setup_arch(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-	unsigned int freq;
-	struct gianfar_platform_data *pdata;
-	struct gianfar_mdio_data *mdata;
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	if (ppc_md.progress)
-		ppc_md.progress("sbc8560_setup_arch()", 0);
-
-	/* Set loops_per_jiffy to a half-way reasonable value,
-	   for use until calibrate_delay gets called. */
-	loops_per_jiffy = freq / HZ;
-
-#ifdef CONFIG_PCI
-	/* setup PCI host bridges */
-	mpc85xx_setup_hose();
-#endif
-#ifdef CONFIG_SERIAL_8250
-	sbc8560_early_serial_map();
-#endif
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-	/* Invalidate the entry we stole earlier the serial ports
-	 * should be properly mapped */ 
-	invalidate_tlbcam_entry(num_tlbcam_entries - 1);
-#endif
-
-	/* setup the board related info for the MDIO bus */
-	mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
-
-	mdata->irq[25] = MPC85xx_IRQ_EXT6;
-	mdata->irq[26] = MPC85xx_IRQ_EXT7;
-	mdata->irq[31] = PHY_POLL;
-
-	/* setup the board related information for the enet controllers */
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 25;
-		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
-	}
-
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 26;
-		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
-	}
-
-#ifdef CONFIG_BLK_DEV_INITRD
-	if (initrd_start)
-		ROOT_DEV = Root_RAM0;
-	else
-#endif
-#ifdef  CONFIG_ROOT_NFS
-		ROOT_DEV = Root_NFS;
-#else
-		ROOT_DEV = Root_HDA1;
-#endif
-}
-
-/* ************************************************************************ */
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-	      unsigned long r6, unsigned long r7)
-{
-	/* parse_bootinfo must always be called first */
-	parse_bootinfo(find_bootinfo());
-
-	/*
-	 * If we were passed in a board information, copy it into the
-	 * residual data area.
-	 */
-	if (r3) {
-		memcpy((void *) __res, (void *) (r3 + KERNELBASE),
-		       sizeof (bd_t));
-	}
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-	/* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
-	settlbcam(num_tlbcam_entries - 1, UARTA_ADDR,
-		  UARTA_ADDR, 0x1000, _PAGE_IO, 0);
-#endif
-
-#if defined(CONFIG_BLK_DEV_INITRD)
-	/*
-	 * If the init RAM disk has been configured in, and there's a valid
-	 * starting address for it, set it up.
-	 */
-	if (r4) {
-		initrd_start = r4 + KERNELBASE;
-		initrd_end = r5 + KERNELBASE;
-	}
-#endif				/* CONFIG_BLK_DEV_INITRD */
-
-	/* Copy the kernel command line arguments to a safe place. */
-
-	if (r6) {
-		*(char *) (r7 + KERNELBASE) = 0;
-		strcpy(cmd_line, (char *) (r6 + KERNELBASE));
-	}
-
-	identify_ppc_sys_by_id(mfspr(SPRN_SVR));
-
-	/* setup the PowerPC module struct */
-	ppc_md.setup_arch = sbc8560_setup_arch;
-	ppc_md.show_cpuinfo = sbc8560_show_cpuinfo;
-
-	ppc_md.init_IRQ = sbc8560_init_IRQ;
-	ppc_md.get_irq = openpic_get_irq;
-
-	ppc_md.restart = mpc85xx_restart;
-	ppc_md.power_off = mpc85xx_power_off;
-	ppc_md.halt = mpc85xx_halt;
-
-	ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
-
-	ppc_md.time_init = NULL;
-	ppc_md.set_rtc_time = NULL;
-	ppc_md.get_rtc_time = NULL;
-	ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
-
-#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
-	ppc_md.progress = gen550_progress;
-#endif	/* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
-#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
-	ppc_md.early_serial_map = sbc8560_early_serial_map;
-#endif	/* CONFIG_SERIAL_8250 && CONFIG_KGDB */
-
-	if (ppc_md.progress)
-		ppc_md.progress("sbc8560_init(): exit", 0);
-}
diff --git a/arch/ppc/platforms/85xx/sbc8560.h b/arch/ppc/platforms/85xx/sbc8560.h
deleted file mode 100644
index e5e156f6010..00000000000
--- a/arch/ppc/platforms/85xx/sbc8560.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Wind River SBC8560 board definitions
- *
- * Copyright 2003 Motorola Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
- 
-#ifndef __MACH_SBC8560_H__
-#define __MACH_SBC8560_H__
- 
-#include <platforms/85xx/sbc85xx.h>
-#include <asm/irq.h>
-
-#define CPM_MAP_ADDR    (CCSRBAR + MPC85xx_CPM_OFFSET)
- 
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define RS_TABLE_SIZE  64
-#else
-#define RS_TABLE_SIZE  2
-#endif
- 
-/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
-#define BASE_BAUD ( 1843200 / 16 )
- 
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_SKIP_TEST)
-#endif
-
-#define STD_SERIAL_PORT_DFNS \
-        { 0, BASE_BAUD, UARTA_ADDR, MPC85xx_IRQ_EXT9, STD_COM_FLAGS, /* ttyS0 */ \
-                iomem_base: (u8 *)UARTA_ADDR,                       \
-                io_type: SERIAL_IO_MEM },                                 \
-        { 0, BASE_BAUD, UARTB_ADDR, MPC85xx_IRQ_EXT10, STD_COM_FLAGS, /* ttyS1 */ \
-                iomem_base: (u8 *)UARTB_ADDR,                       \
-                io_type: SERIAL_IO_MEM },
- 
-#define SERIAL_PORT_DFNS \
-        STD_SERIAL_PORT_DFNS
- 
-#endif /* __MACH_SBC8560_H__ */
diff --git a/arch/ppc/platforms/85xx/sbc85xx.c b/arch/ppc/platforms/85xx/sbc85xx.c
deleted file mode 100644
index 2c587ca97bc..00000000000
--- a/arch/ppc/platforms/85xx/sbc85xx.c
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
- * WindRiver PowerQUICC III SBC85xx board common routines
- *
- * Copyright 2002, 2003 Motorola Inc.
- * Copyright 2004 Red Hat, Inc.
- * 
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/serial.h>
-#include <linux/module.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/open_pic.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc85xx.h>
-#include <asm/irq.h>
-#include <asm/immap_85xx.h>
-#include <asm/ppc_sys.h>
-
-#include <mm/mmu_decl.h>
-
-#include <platforms/85xx/sbc85xx.h>
-
-unsigned char __res[sizeof (bd_t)];
-
-#ifndef CONFIG_PCI
-unsigned long isa_io_base = 0;
-unsigned long isa_mem_base = 0;
-unsigned long pci_dram_offset = 0;
-#endif
-
-extern unsigned long total_memory;	/* in mm/init */
-
-/* Internal interrupts are all Level Sensitive, and Positive Polarity */
-static u_char sbc8560_openpic_initsenses[] __initdata = {
-	MPC85XX_INTERNAL_IRQ_SENSES,
-	0x0,				/* External  0: */
-	0x0,				/* External  1: */
-#if defined(CONFIG_PCI)
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 2: PCI slot 0 */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 3: PCI slot 1 */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 4: PCI slot 2 */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 5: PCI slot 3 */
-#else
-	0x0,				/* External  2: */
-	0x0,				/* External  3: */
-	0x0,				/* External  4: */
-	0x0,				/* External  5: */
-#endif
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 6: PHY */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 7: PHY */
-	0x0,				/* External  8: */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* External 9: PHY */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* External 10: PHY */
-	0x0,				/* External 11: */
-};
-
-/* ************************************************************************ */
-int
-sbc8560_show_cpuinfo(struct seq_file *m)
-{
-	uint pvid, svid, phid1;
-	uint memsize = total_memory;
-	bd_t *binfo = (bd_t *) __res;
-	unsigned int freq;
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	pvid = mfspr(SPRN_PVR);
-	svid = mfspr(SPRN_SVR);
-
-	seq_printf(m, "Vendor\t\t: Wind River\n");
-	seq_printf(m, "Machine\t\t: SBC%s\n", cur_ppc_sys_spec->ppc_sys_name);
-	seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
-	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
-	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
-
-	/* Display cpu Pll setting */
-	phid1 = mfspr(SPRN_HID1);
-	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
-
-	/* Display the amount of memory */
-	seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
-
-	return 0;
-}
-
-void __init
-sbc8560_init_IRQ(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-	/* Determine the Physical Address of the OpenPIC regs */
-	phys_addr_t OpenPIC_PAddr =
-	    binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
-	OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
-	OpenPIC_InitSenses = sbc8560_openpic_initsenses;
-	OpenPIC_NumInitSenses = sizeof (sbc8560_openpic_initsenses);
-
-	/* Skip reserved space and internal sources */
-	openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
-	/* Map PIC IRQs 0-11 */
-	openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
-
-	/* we let openpic interrupts starting from an offset, to 
-	 * leave space for cascading interrupts underneath.
-	 */
-	openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
-
-	return;
-}
-
-/*
- * interrupt routing
- */
-
-#ifdef CONFIG_PCI
-int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel,
-		    unsigned char pin)
-{
-	static char pci_irq_table[][4] =
-	    /*
-	     *      PCI IDSEL/INTPIN->INTLINE
-	     *        A      B      C      D
-	     */
-	{
-		{PIRQA, PIRQB, PIRQC, PIRQD},
-		{PIRQD, PIRQA, PIRQB, PIRQC},
-		{PIRQC, PIRQD, PIRQA, PIRQB},
-		{PIRQB, PIRQC, PIRQD, PIRQA},
-	};
-
-	const long min_idsel = 12, max_idsel = 15, irqs_per_slot = 4;
-	return PCI_IRQ_TABLE_LOOKUP;
-}
-
-int mpc85xx_exclude_device(u_char bus, u_char devfn)
-{
-	if (bus == 0 && PCI_SLOT(devfn) == 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	else
-		return PCIBIOS_SUCCESSFUL;
-}
-#endif /* CONFIG_PCI */
diff --git a/arch/ppc/platforms/85xx/sbc85xx.h b/arch/ppc/platforms/85xx/sbc85xx.h
deleted file mode 100644
index 51df4dc04e2..00000000000
--- a/arch/ppc/platforms/85xx/sbc85xx.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * WindRiver PowerQUICC III SBC85xx common board definitions
- *
- * Copyright 2003 Motorola Inc.
- * Copyright 2004 Red Hat, Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef __PLATFORMS_85XX_SBC85XX_H__
-#define __PLATFORMS_85XX_SBC85XX_H__
-
-#include <linux/init.h>
-#include <linux/seq_file.h>
-#include <asm/ppcboot.h>
-
-#define BOARD_CCSRBAR		((uint)0xff700000)
-#define CCSRBAR_SIZE		((uint)1024*1024)
-
-#define BCSR_ADDR		((uint)0xfc000000)
-#define BCSR_SIZE		((uint)(16 * 1024 * 1024))
-
-#define UARTA_ADDR		(BCSR_ADDR + 0x00700000)
-#define UARTB_ADDR		(BCSR_ADDR + 0x00800000)
-#define RTC_DEVICE_ADDR		(BCSR_ADDR + 0x00900000)
-#define EEPROM_ADDR		(BCSR_ADDR + 0x00b00000)
-
-extern int  sbc8560_show_cpuinfo(struct seq_file *m);
-extern void sbc8560_init_IRQ(void) __init; 
-
-/* PCI interrupt controller */
-#define PIRQA		MPC85xx_IRQ_EXT1
-#define PIRQB		MPC85xx_IRQ_EXT2
-#define PIRQC		MPC85xx_IRQ_EXT3
-#define PIRQD		MPC85xx_IRQ_EXT4
-
-#define MPC85XX_PCI1_LOWER_IO	0x00000000
-#define MPC85XX_PCI1_UPPER_IO	0x00ffffff
-
-#define MPC85XX_PCI1_LOWER_MEM	0x80000000
-#define MPC85XX_PCI1_UPPER_MEM	0x9fffffff
-
-#define MPC85XX_PCI1_IO_BASE	0xe2000000
-#define MPC85XX_PCI1_MEM_OFFSET	0x00000000
-
-#define MPC85XX_PCI1_IO_SIZE	0x01000000
-
-/* FCC1 Clock Source Configuration.  These can be
- * redefined in the board specific file.
- *    Can only choose from CLK9-12 */
-#define F1_RXCLK       12
-#define F1_TXCLK       11
-
-/* FCC2 Clock Source Configuration.  These can be
- * redefined in the board specific file.
- *    Can only choose from CLK13-16 */
-#define F2_RXCLK       13
-#define F2_TXCLK       14
-
-/* FCC3 Clock Source Configuration.  These can be
- * redefined in the board specific file.
- *    Can only choose from CLK13-16 */
-#define F3_RXCLK       15
-#define F3_TXCLK       16
-
-#endif /* __PLATFORMS_85XX_SBC85XX_H__ */
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c
deleted file mode 100644
index 8748da3b3e0..00000000000
--- a/arch/ppc/platforms/85xx/stx_gp3.c
+++ /dev/null
@@ -1,339 +0,0 @@
-/*
- * STx GP3 board specific routines
- *
- * Dan Malek <dan@embeddededge.com>
- * Copyright 2004 Embedded Edge, LLC
- *
- * Copied from mpc8560_ads.c
- * Copyright 2002, 2003 Motorola Inc.
- *
- * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2004-2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/blkdev.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/root_dev.h>
-#include <linux/seq_file.h>
-#include <linux/serial.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
-#include <linux/fsl_devices.h>
-#include <linux/interrupt.h>
-#include <linux/rio.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/open_pic.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc85xx.h>
-#include <asm/irq.h>
-#include <asm/immap_85xx.h>
-#include <asm/cpm2.h>
-#include <asm/ppc_sys.h>
-
-#include <syslib/cpm2_pic.h>
-#include <syslib/ppc85xx_common.h>
-
-
-unsigned char __res[sizeof(bd_t)];
-
-#ifndef CONFIG_PCI
-unsigned long isa_io_base = 0;
-unsigned long isa_mem_base = 0;
-unsigned long pci_dram_offset = 0;
-#endif
-
-/* Internal interrupts are all Level Sensitive, and Positive Polarity */
-static u8 gp3_openpic_initsenses[] __initdata = {
-	MPC85XX_INTERNAL_IRQ_SENSES,
-	0x0,						/* External  0: */
-#if defined(CONFIG_PCI)
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 1: PCI slot 0 */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 2: PCI slot 1 */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 3: PCI slot 2 */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 4: PCI slot 3 */
-#else
-	0x0,				/* External  1: */
-	0x0,				/* External  2: */
-	0x0,				/* External  3: */
-	0x0,				/* External  4: */
-#endif
-	0x0,				/* External  5: */
-	0x0,				/* External  6: */
-	0x0,				/* External  7: */
-	0x0,				/* External  8: */
-	0x0,				/* External  9: */
-	0x0,				/* External 10: */
-	0x0,				/* External 11: */
-};
-
-/*
- * Setup the architecture
- */
-static void __init
-gp3_setup_arch(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-	unsigned int freq;
-	struct gianfar_platform_data *pdata;
-	struct gianfar_mdio_data *mdata;
-
-	cpm2_reset();
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	if (ppc_md.progress)
-		ppc_md.progress("gp3_setup_arch()", 0);
-
-	/* Set loops_per_jiffy to a half-way reasonable value,
-	   for use until calibrate_delay gets called. */
-	loops_per_jiffy = freq / HZ;
-
-#ifdef CONFIG_PCI
-	/* setup PCI host bridges */
-	mpc85xx_setup_hose();
-#endif
-
-	/* setup the board related info for the MDIO bus */
-	mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
-
-	mdata->irq[2] = MPC85xx_IRQ_EXT5;
-	mdata->irq[4] = MPC85xx_IRQ_EXT5;
-	mdata->irq[31] = PHY_POLL;
-
-	/* setup the board related information for the enet controllers */
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
-	if (pdata) {
-	/*	pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
-		pdata->bus_id = 0;
-		pdata->phy_id = 2;
-		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
-	}
-
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
-	if (pdata) {
-	/*	pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
-		pdata->bus_id = 0;
-		pdata->phy_id = 4;
-		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
-	}
-
-#ifdef CONFIG_BLK_DEV_INITRD
-	if (initrd_start)
-		ROOT_DEV = Root_RAM0;
-	else
-#endif
-#ifdef	CONFIG_ROOT_NFS
-		ROOT_DEV = Root_NFS;
-#else
-		ROOT_DEV = Root_HDA1;
-#endif
-
-	printk ("bi_immr_base = %8.8lx\n", binfo->bi_immr_base);
-}
-
-static irqreturn_t cpm2_cascade(int irq, void *dev_id)
-{
-	while ((irq = cpm2_get_irq()) >= 0)
-		__do_IRQ(irq);
-
-	return IRQ_HANDLED;
-}
-
-static struct irqaction cpm2_irqaction = {
-	.handler	= cpm2_cascade,
-	.flags		= IRQF_DISABLED,
-	.mask		= CPU_MASK_NONE,
-	.name		= "cpm2_cascade",
-};
-
-static void __init
-gp3_init_IRQ(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-
-	/*
-	 * Setup OpenPIC
-	 */
-
-	/* Determine the Physical Address of the OpenPIC regs */
-	phys_addr_t OpenPIC_PAddr =
-	    binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
-	OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
-	OpenPIC_InitSenses = gp3_openpic_initsenses;
-	OpenPIC_NumInitSenses = sizeof (gp3_openpic_initsenses);
-
-	/* Skip reserved space and internal sources */
-	openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
-
-	/* Map PIC IRQs 0-11 */
-	openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
-
-	/*
-	 * Let openpic interrupts starting from an offset, to
-	 * leave space for cascading interrupts underneath.
-	 */
-	openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
-
-	/* Setup CPM2 PIC */
-        cpm2_init_IRQ();
-
-	setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
-
-	return;
-}
-
-static int
-gp3_show_cpuinfo(struct seq_file *m)
-{
-	uint pvid, svid, phid1;
-	bd_t *binfo = (bd_t *) __res;
-	uint	memsize;
-	unsigned int freq;
-	extern unsigned long total_memory;	/* in mm/init */
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	pvid = mfspr(SPRN_PVR);
-	svid = mfspr(SPRN_SVR);
-
-	memsize = total_memory;
-
-	seq_printf(m, "Vendor\t\t: RPC Electronics STx \n");
-	seq_printf(m, "Machine\t\t: GP3 - MPC%s\n", cur_ppc_sys_spec->ppc_sys_name);
-	seq_printf(m, "bus freq\t: %u.%.6u MHz\n", freq / 1000000,
-		   freq % 1000000);
-	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
-	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
-
-	/* Display cpu Pll setting */
-	phid1 = mfspr(SPRN_HID1);
-	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
-
-	/* Display the amount of memory */
-	seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
-
-	return 0;
-}
-
-#ifdef CONFIG_PCI
-int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel,
-		    unsigned char pin)
-{
-	static char pci_irq_table[][4] =
-	    /*
-	     *      PCI IDSEL/INTPIN->INTLINE
-	     *        A      B      C      D
-	     */
-	{
-		{PIRQA, PIRQB, PIRQC, PIRQD},
-		{PIRQD, PIRQA, PIRQB, PIRQC},
-		{PIRQC, PIRQD, PIRQA, PIRQB},
-		{PIRQB, PIRQC, PIRQD, PIRQA},
-	};
-
-	const long min_idsel = 12, max_idsel = 15, irqs_per_slot = 4;
-	return PCI_IRQ_TABLE_LOOKUP;
-}
-
-int mpc85xx_exclude_device(u_char bus, u_char devfn)
-{
-	if (bus == 0 && PCI_SLOT(devfn) == 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	else
-		return PCIBIOS_SUCCESSFUL;
-}
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_RAPIDIO
-extern void mpc85xx_rio_setup(int law_start, int law_size);
-void
-platform_rio_init(void)
-{
-	/*
-	 * The STx firmware configures the RapidIO Local Access Window
-	 * at 0xc0000000 with a size of 512MB.
-	 */
-	mpc85xx_rio_setup(0xc0000000, 0x20000000);
-}
-#endif /* CONFIG_RAPIDIO */
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-	      unsigned long r6, unsigned long r7)
-{
-	/* parse_bootinfo must always be called first */
-	parse_bootinfo(find_bootinfo());
-
-	/*
-	 * If we were passed in a board information, copy it into the
-	 * residual data area.
-	 */
-	if (r3) {
-		memcpy((void *) __res, (void *) (r3 + KERNELBASE),
-		       sizeof (bd_t));
-
-	}
-#if defined(CONFIG_BLK_DEV_INITRD)
-	/*
-	 * If the init RAM disk has been configured in, and there's a valid
-	 * starting address for it, set it up.
-	 */
-	if (r4) {
-		initrd_start = r4 + KERNELBASE;
-		initrd_end = r5 + KERNELBASE;
-	}
-#endif				/* CONFIG_BLK_DEV_INITRD */
-
-	/* Copy the kernel command line arguments to a safe place. */
-
-	if (r6) {
-		*(char *) (r7 + KERNELBASE) = 0;
-		strcpy(cmd_line, (char *) (r6 + KERNELBASE));
-	}
-
-	identify_ppc_sys_by_id(mfspr(SPRN_SVR));
-
-	/* setup the PowerPC module struct */
-	ppc_md.setup_arch = gp3_setup_arch;
-	ppc_md.show_cpuinfo = gp3_show_cpuinfo;
-
-	ppc_md.init_IRQ = gp3_init_IRQ;
-	ppc_md.get_irq = openpic_get_irq;
-
-	ppc_md.restart = mpc85xx_restart;
-	ppc_md.power_off = mpc85xx_power_off;
-	ppc_md.halt = mpc85xx_halt;
-
-	ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
-
-	ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
-
-	if (ppc_md.progress)
-		ppc_md.progress("platform_init(): exit", 0);
-
-	return;
-}
diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h
deleted file mode 100644
index c6e34c09e97..00000000000
--- a/arch/ppc/platforms/85xx/stx_gp3.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * STx GP3 board definitions
- *
- * Dan Malek (dan@embeddededge.com)
- * Copyright 2004 Embedded Edge, LLC
- *
- * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2004-2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef __MACH_STX_GP3_H
-#define __MACH_STX_GP3_H
-
-#include <linux/init.h>
-#include <asm/ppcboot.h>
-
-#define BOARD_CCSRBAR		((uint)0xe0000000)
-#define CCSRBAR_SIZE		((uint)1024*1024)
-
-#define CPM_MAP_ADDR		(CCSRBAR + MPC85xx_CPM_OFFSET)
-
-#define BCSR_ADDR		((uint)0xfc000000)
-#define BCSR_SIZE		((uint)(16 * 1024))
-
-#define BCSR_TSEC1_RESET	0x00000080
-#define BCSR_TSEC2_RESET	0x00000040
-#define BCSR_LED1		0x00000008
-#define BCSR_LED2		0x00000004
-#define BCSR_LED3		0x00000002
-#define BCSR_LED4		0x00000001
-
-extern void mpc85xx_setup_hose(void) __init;
-extern void mpc85xx_restart(char *cmd);
-extern void mpc85xx_power_off(void);
-extern void mpc85xx_halt(void);
-extern void mpc85xx_init_IRQ(void) __init;
-extern unsigned long mpc85xx_find_end_of_memory(void) __init;
-extern void mpc85xx_calibrate_decr(void) __init;
-
-#define PCI_CFG_ADDR_OFFSET	(0x8000)
-#define PCI_CFG_DATA_OFFSET	(0x8004)
-
-/* PCI interrupt controller */
-#define PIRQA		MPC85xx_IRQ_EXT1
-#define PIRQB		MPC85xx_IRQ_EXT2
-#define PIRQC		MPC85xx_IRQ_EXT3
-#define PIRQD		MPC85xx_IRQ_EXT4
-#define PCI_MIN_IDSEL	16
-#define PCI_MAX_IDSEL	19
-#define PCI_IRQ_SLOT	4
-
-#define MPC85XX_PCI1_LOWER_IO	0x00000000
-#define MPC85XX_PCI1_UPPER_IO	0x00ffffff
-
-#define MPC85XX_PCI1_LOWER_MEM	0x80000000
-#define MPC85XX_PCI1_UPPER_MEM	0x9fffffff
-
-#define MPC85XX_PCI1_IO_BASE	0xe2000000
-#define MPC85XX_PCI1_MEM_OFFSET	0x00000000
-
-#define MPC85XX_PCI1_IO_SIZE	0x01000000
-
-#endif /* __MACH_STX_GP3_H */
diff --git a/arch/ppc/platforms/85xx/tqm85xx.c b/arch/ppc/platforms/85xx/tqm85xx.c
deleted file mode 100644
index 2a863a83d4c..00000000000
--- a/arch/ppc/platforms/85xx/tqm85xx.c
+++ /dev/null
@@ -1,412 +0,0 @@
-/*
- * TQM85xx (40/41/55/60) board specific routines
- *
- * Copyright (c) 2005 DENX Software Engineering
- * Stefan Roese <sr@denx.de>
- *
- * Based on original work by
- * 	Kumar Gala <galak@kernel.crashing.org>
- *      Copyright 2004 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/serial.h>
-#include <linux/tty.h>	/* for linux/serial_core.h */
-#include <linux/serial_core.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
-#include <linux/fsl_devices.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/open_pic.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc85xx.h>
-#include <asm/irq.h>
-#include <asm/immap_85xx.h>
-#include <asm/kgdb.h>
-#include <asm/ppc_sys.h>
-#include <asm/cpm2.h>
-#include <mm/mmu_decl.h>
-
-#include <syslib/ppc85xx_setup.h>
-#include <syslib/cpm2_pic.h>
-#include <syslib/ppc85xx_common.h>
-
-#ifndef CONFIG_PCI
-unsigned long isa_io_base = 0;
-unsigned long isa_mem_base = 0;
-#endif
-
-
-extern unsigned long total_memory;	/* in mm/init */
-
-unsigned char __res[sizeof (bd_t)];
-
-/* Internal interrupts are all Level Sensitive, and Positive Polarity */
-static u_char tqm85xx_openpic_initsenses[] __initdata = {
-	MPC85XX_INTERNAL_IRQ_SENSES,
-	0x0,						/* External  0: */
-	0x0,						/* External  1: */
-#if defined(CONFIG_PCI)
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 2: PCI INTA */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 3: PCI INTB */
-#else
-	0x0,				/* External  2: */
-	0x0,				/* External  3: */
-#endif
-	0x0,				/* External  4: */
-	0x0,				/* External  5: */
-	0x0,				/* External  6: */
-	0x0,				/* External  7: */
-	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 8: PHY */
-	0x0,				/* External  9: */
-	0x0,				/* External 10: */
-	0x0,				/* External 11: */
-};
-
-/* ************************************************************************
- *
- * Setup the architecture
- *
- */
-static void __init
-tqm85xx_setup_arch(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-	unsigned int freq;
-	struct gianfar_platform_data *pdata;
-	struct gianfar_mdio_data *mdata;
-
-#ifdef CONFIG_MPC8560
-	cpm2_reset();
-#endif
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	if (ppc_md.progress)
-		ppc_md.progress("tqm85xx_setup_arch()", 0);
-
-	/* Set loops_per_jiffy to a half-way reasonable value,
-	   for use until calibrate_delay gets called. */
-	loops_per_jiffy = freq / HZ;
-
-#ifdef CONFIG_PCI
-	/* setup PCI host bridges */
-	mpc85xx_setup_hose();
-#endif
-
-#ifndef CONFIG_MPC8560
-#if defined(CONFIG_SERIAL_8250)
-	mpc85xx_early_serial_map();
-#endif
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-	/* Invalidate the entry we stole earlier the serial ports
-	 * should be properly mapped */
-	invalidate_tlbcam_entry(num_tlbcam_entries - 1);
-#endif
-#endif /* CONFIG_MPC8560 */
-
-	/* setup the board related info for the MDIO bus */
-	mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
-
-	mdata->irq[0] = MPC85xx_IRQ_EXT8;
-	mdata->irq[1] = MPC85xx_IRQ_EXT8;
-	mdata->irq[2] = PHY_POLL;
-	mdata->irq[3] = MPC85xx_IRQ_EXT8;
-	mdata->irq[31] = PHY_POLL;
-
-	/* setup the board related information for the enet controllers */
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 2;
-		memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
-	}
-
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
-	if (pdata) {
-		pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-		pdata->bus_id = 0;
-		pdata->phy_id = 1;
-		memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
-	}
-
-#ifdef CONFIG_MPC8540
-	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
-	if (pdata) {
-		pdata->board_flags = 0;
-		pdata->bus_id = 0;
-		pdata->phy_id = 3;
-		memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
-	}
-#endif
-
-#ifdef CONFIG_BLK_DEV_INITRD
-	if (initrd_start)
-		ROOT_DEV = Root_RAM0;
-	else
-#endif
-#ifdef  CONFIG_ROOT_NFS
-		ROOT_DEV = Root_NFS;
-#else
-	ROOT_DEV = Root_HDA1;
-#endif
-}
-
-#ifdef CONFIG_MPC8560
-static irqreturn_t cpm2_cascade(int irq, void *dev_id)
-{
-	while ((irq = cpm2_get_irq()) >= 0)
-		__do_IRQ(irq);
-	return IRQ_HANDLED;
-}
-
-static struct irqaction cpm2_irqaction = {
-	.handler = cpm2_cascade,
-	.flags = IRQF_DISABLED,
-	.mask = CPU_MASK_NONE,
-	.name = "cpm2_cascade",
-};
-#endif /* CONFIG_MPC8560 */
-
-void __init
-tqm85xx_init_IRQ(void)
-{
-	bd_t *binfo = (bd_t *) __res;
-
-	/* Determine the Physical Address of the OpenPIC regs */
-	phys_addr_t OpenPIC_PAddr =
-		binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
-	OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
-	OpenPIC_InitSenses = tqm85xx_openpic_initsenses;
-	OpenPIC_NumInitSenses = sizeof (tqm85xx_openpic_initsenses);
-
-	/* Skip reserved space and internal sources */
-	openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
-
-	/* Map PIC IRQs 0-11 */
-	openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
-
-	/* we let openpic interrupts starting from an offset, to
-	 * leave space for cascading interrupts underneath.
-	 */
-	openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
-
-#ifdef CONFIG_MPC8560
-	/* Setup CPM2 PIC */
-        cpm2_init_IRQ();
-
-	setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
-#endif /* CONFIG_MPC8560 */
-
-	return;
-}
-
-int tqm85xx_show_cpuinfo(struct seq_file *m)
-{
-	uint pvid, svid, phid1;
-	uint memsize = total_memory;
-	bd_t *binfo = (bd_t *) __res;
-	unsigned int freq;
-
-	/* get the core frequency */
-	freq = binfo->bi_intfreq;
-
-	pvid = mfspr(SPRN_PVR);
-	svid = mfspr(SPRN_SVR);
-
-	seq_printf(m, "Vendor\t\t: TQ Components\n");
-	seq_printf(m, "Machine\t\t: TQM%s\n", cur_ppc_sys_spec->ppc_sys_name);
-	seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
-	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
-	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
-
-	/* Display cpu Pll setting */
-	phid1 = mfspr(SPRN_HID1);
-	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
-
-	/* Display the amount of memory */
-	seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
-
-	return 0;
-}
-
-#if defined(CONFIG_I2C) && defined(CONFIG_SENSORS_DS1337)
-extern ulong ds1337_get_rtc_time(void);
-extern int ds1337_set_rtc_time(unsigned long nowtime);
-
-static int __init
-tqm85xx_rtc_hookup(void)
-{
-	struct timespec	tv;
-
-        ppc_md.set_rtc_time = ds1337_set_rtc_time;
-        ppc_md.get_rtc_time = ds1337_get_rtc_time;
-
-	tv.tv_nsec = 0;
-	tv.tv_sec = (ppc_md.get_rtc_time)();
-	do_settimeofday(&tv);
-
-	return 0;
-}
-late_initcall(tqm85xx_rtc_hookup);
-#endif
-
-#ifdef CONFIG_PCI
-/*
- * interrupt routing
- */
-int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
-	static char pci_irq_table[][4] =
-		/*
-		 *      PCI IDSEL/INTPIN->INTLINE
-		 *       A      B      C      D
-		 */
-		{
-			{PIRQA, PIRQB, 0, 0},
-		};
-
-	const long min_idsel = 0x1c, max_idsel = 0x1c, irqs_per_slot = 4;
-	return PCI_IRQ_TABLE_LOOKUP;
-}
-
-int mpc85xx_exclude_device(u_char bus, u_char devfn)
-{
-	if (bus == 0 && PCI_SLOT(devfn) == 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	else
-		return PCIBIOS_SUCCESSFUL;
-}
-
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_RAPIDIO
-extern void mpc85xx_rio_setup(int law_start, int law_size);
-void platform_rio_init(void)
-{
-	/* 512MB RIO LAW at 0xc0000000 */
-	mpc85xx_rio_setup(0xc0000000, 0x20000000);
-}
-#endif /* CONFIG_RAPIDIO */
-
-/* ************************************************************************ */
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-	      unsigned long r6, unsigned long r7)
-{
-	/* parse_bootinfo must always be called first */
-	parse_bootinfo(find_bootinfo());
-
-	/*
-	 * If we were passed in a board information, copy it into the
-	 * residual data area.
-	 */
-	if (r3) {
-		memcpy((void *) __res, (void *) (r3 + KERNELBASE),
-		       sizeof (bd_t));
-	}
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) && !defined(CONFIG_MPC8560)
-	{
-		bd_t *binfo = (bd_t *) __res;
-		struct uart_port p;
-
-		/* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
-		settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base,
-			  binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
-
-		memset(&p, 0, sizeof (p));
-		p.iotype = UPIO_MEM;
-		p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
-		p.uartclk = binfo->bi_busfreq;
-
-		gen550_init(0, &p);
-
-		memset(&p, 0, sizeof (p));
-		p.iotype = UPIO_MEM;
-		p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
-		p.uartclk = binfo->bi_busfreq;
-
-		gen550_init(1, &p);
-	}
-#endif
-
-#if defined(CONFIG_BLK_DEV_INITRD)
-	/*
-	 * If the init RAM disk has been configured in, and there's a valid
-	 * starting address for it, set it up.
-	 */
-	if (r4) {
-		initrd_start = r4 + KERNELBASE;
-		initrd_end = r5 + KERNELBASE;
-	}
-#endif				/* CONFIG_BLK_DEV_INITRD */
-
-	/* Copy the kernel command line arguments to a safe place. */
-
-	if (r6) {
-		*(char *) (r7 + KERNELBASE) = 0;
-		strcpy(cmd_line, (char *) (r6 + KERNELBASE));
-	}
-
-	identify_ppc_sys_by_id(mfspr(SPRN_SVR));
-
-	/* setup the PowerPC module struct */
-	ppc_md.setup_arch = tqm85xx_setup_arch;
-	ppc_md.show_cpuinfo = tqm85xx_show_cpuinfo;
-
-	ppc_md.init_IRQ = tqm85xx_init_IRQ;
-	ppc_md.get_irq = openpic_get_irq;
-
-	ppc_md.restart = mpc85xx_restart;
-	ppc_md.power_off = mpc85xx_power_off;
-	ppc_md.halt = mpc85xx_halt;
-
-	ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
-
-	ppc_md.time_init = NULL;
-	ppc_md.set_rtc_time = NULL;
-	ppc_md.get_rtc_time = NULL;
-	ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
-
-#ifndef CONFIG_MPC8560
-#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
-	ppc_md.progress = gen550_progress;
-#endif	/* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
-#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
-	ppc_md.early_serial_map = mpc85xx_early_serial_map;
-#endif	/* CONFIG_SERIAL_8250 && CONFIG_KGDB */
-#endif /* CONFIG_MPC8560 */
-
-	if (ppc_md.progress)
-		ppc_md.progress("tqm85xx_init(): exit", 0);
-
-	return;
-}
diff --git a/arch/ppc/platforms/85xx/tqm85xx.h b/arch/ppc/platforms/85xx/tqm85xx.h
deleted file mode 100644
index 57284e68f67..00000000000
--- a/arch/ppc/platforms/85xx/tqm85xx.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * TQM85xx (40/41/55/60) board definitions
- *
- * Copyright (c) 2005 DENX Software Engineering
- * Stefan Roese <sr@denx.de>
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef __MACH_TQM85XX_H
-#define __MACH_TQM85XX_H
-
-#include <linux/init.h>
-#include <asm/ppcboot.h>
-
-#define BOARD_CCSRBAR		((uint)0xe0000000)
-#define CCSRBAR_SIZE		((uint)1024*1024)
-
-#define CPM_MAP_ADDR		(CCSRBAR + MPC85xx_CPM_OFFSET)
-
-#define PCI_CFG_ADDR_OFFSET	(0x8000)
-#define PCI_CFG_DATA_OFFSET	(0x8004)
-
-/* PCI interrupt controller */
-#define PIRQA			MPC85xx_IRQ_EXT2
-#define PIRQB			MPC85xx_IRQ_EXT3
-
-#define MPC85XX_PCI1_LOWER_IO	0x00000000
-#define MPC85XX_PCI1_UPPER_IO	0x00ffffff
-
-#define MPC85XX_PCI1_LOWER_MEM	0x80000000
-#define MPC85XX_PCI1_UPPER_MEM	0x9fffffff
-
-#define MPC85XX_PCI1_IO_BASE	0xe2000000
-#define MPC85XX_PCI1_MEM_OFFSET	0x00000000
-
-#define MPC85XX_PCI1_IO_SIZE	0x01000000
-
-#define BASE_BAUD 115200
-
-extern void mpc85xx_setup_hose(void) __init;
-extern void mpc85xx_restart(char *cmd);
-extern void mpc85xx_power_off(void);
-extern void mpc85xx_halt(void);
-extern void mpc85xx_init_IRQ(void) __init;
-extern unsigned long mpc85xx_find_end_of_memory(void) __init;
-extern void mpc85xx_calibrate_decr(void) __init;
-
-#endif /* __MACH_TQM85XX_H */
author	Kumar Gala <galak@kernel.crashing.org>	2008-01-27 14:06:14 -0600
committer	Kumar Gala <galak@kernel.crashing.org>	2008-01-28 08:33:10 -0600
commit	c42f3ad7f1bf17f31c3febdc71034ed6d793d40f (patch)
tree	5a56c44717cf8fe4a5f402370506e5fbb78368e4 /arch/ppc/platforms/85xx
parent	3155f7f23f7865e64f7eb14e226a2dff8197e51f (diff)