Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/ppc64-2.6

1 files changed, 77 insertions, 13 deletions

diff --git a/arch/ppc64/kernel/cputable.c b/arch/ppc64/kernel/cputable.c
index 4847f2ac8c9..8831a28c3c4 100644
--- a/arch/ppc64/kernel/cputable.c
+++ b/arch/ppc64/kernel/cputable.c
@@ -19,6 +19,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 
+#include <asm/oprofile_impl.h>
 #include <asm/cputable.h>
 
 struct cpu_spec* cur_cpu_spec = NULL;
@@ -54,24 +55,32 @@ struct cpu_spec	cpu_specs[] = {
 		.pvr_value		= 0x00400000,
 		.cpu_name		= "POWER3 (630)",
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
-			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
-			CPU_FTR_PMC8,
+			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
 		.cpu_user_features = COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 8,
 		.cpu_setup		= __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/power3",
+		.oprofile_model		= &op_model_rs64,
+#endif
 	},
 	{	/* Power3+ */
 		.pvr_mask		= 0xffff0000,
 		.pvr_value		= 0x00410000,
 		.cpu_name		= "POWER3 (630+)",
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
-			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
-			CPU_FTR_PMC8,
+			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
 		.cpu_user_features	= COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 8,
 		.cpu_setup		= __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/power3",
+		.oprofile_model		= &op_model_rs64,
+#endif
 	},
 	{	/* Northstar */
 		.pvr_mask		= 0xffff0000,
@@ -79,11 +88,16 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_name		= "RS64-II (northstar)",
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
 			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
-			CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL,
+			CPU_FTR_MMCRA | CPU_FTR_CTRL,
 		.cpu_user_features	= COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 8,
 		.cpu_setup		= __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/rs64",
+		.oprofile_model		= &op_model_rs64,
+#endif
 	},
 	{	/* Pulsar */
 		.pvr_mask		= 0xffff0000,
@@ -91,11 +105,16 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_name		= "RS64-III (pulsar)",
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
 			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
-			CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL,
+			CPU_FTR_MMCRA | CPU_FTR_CTRL,
 		.cpu_user_features	= COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 8,
 		.cpu_setup		= __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/rs64",
+		.oprofile_model		= &op_model_rs64,
+#endif
 	},
 	{	/* I-star */
 		.pvr_mask		= 0xffff0000,
@@ -103,11 +122,16 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_name		= "RS64-III (icestar)",
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
 			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
-			CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL,
+			CPU_FTR_MMCRA | CPU_FTR_CTRL,
 		.cpu_user_features	= COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 8,
 		.cpu_setup		= __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/rs64",
+		.oprofile_model		= &op_model_rs64,
+#endif
 	},
 	{	/* S-star */
 		.pvr_mask		= 0xffff0000,
@@ -115,11 +139,16 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_name		= "RS64-IV (sstar)",
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
 			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
-			CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL,
+			CPU_FTR_MMCRA | CPU_FTR_CTRL,
 		.cpu_user_features	= COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 8,
 		.cpu_setup		= __setup_cpu_power3,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/rs64",
+		.oprofile_model		= &op_model_rs64,
+#endif
 	},
 	{	/* Power4 */
 		.pvr_mask		= 0xffff0000,
@@ -127,11 +156,16 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_name		= "POWER4 (gp)",
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
 			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-			CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
+			CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
 		.cpu_user_features	= COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 8,
 		.cpu_setup		= __setup_cpu_power4,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/power4",
+		.oprofile_model		= &op_model_rs64,
+#endif
 	},
 	{	/* Power4+ */
 		.pvr_mask		= 0xffff0000,
@@ -139,11 +173,16 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_name		= "POWER4+ (gq)",
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
 			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
-			CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
+			CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
 		.cpu_user_features	= COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 8,
 		.cpu_setup		= __setup_cpu_power4,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/power4",
+		.oprofile_model		= &op_model_power4,
+#endif
 	},
 	{	/* PPC970 */
 		.pvr_mask		= 0xffff0000,
@@ -152,12 +191,17 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
 			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 			CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
-			CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
+			CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
 		.cpu_user_features	= COMMON_USER_PPC64 |
 			PPC_FEATURE_HAS_ALTIVEC_COMP,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 8,
 		.cpu_setup		= __setup_cpu_ppc970,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/970",
+		.oprofile_model		= &op_model_power4,
+#endif
 	},
 	{	/* PPC970FX */
 		.pvr_mask		= 0xffff0000,
@@ -166,12 +210,17 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
 			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 			CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
-			CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
+			CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
 		.cpu_user_features	= COMMON_USER_PPC64 |
 			PPC_FEATURE_HAS_ALTIVEC_COMP,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 8,
 		.cpu_setup		= __setup_cpu_ppc970,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/970",
+		.oprofile_model		= &op_model_power4,
+#endif
 	},
 	{	/* PPC970MP */
 		.pvr_mask		= 0xffff0000,
@@ -180,12 +229,16 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
 			CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 			CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
-			CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA,
+			CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
 		.cpu_user_features	= COMMON_USER_PPC64 |
 			PPC_FEATURE_HAS_ALTIVEC_COMP,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
 		.cpu_setup		= __setup_cpu_ppc970,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/970",
+		.oprofile_model		= &op_model_power4,
+#endif
 	},
 	{	/* Power5 */
 		.pvr_mask		= 0xffff0000,
@@ -199,7 +252,12 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_user_features	= COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 6,
 		.cpu_setup		= __setup_cpu_power4,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/power5",
+		.oprofile_model		= &op_model_power4,
+#endif
 	},
 	{	/* Power5 */
 		.pvr_mask		= 0xffff0000,
@@ -213,7 +271,12 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_user_features	= COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 6,
 		.cpu_setup		= __setup_cpu_power4,
+#ifdef CONFIG_OPROFILE
+		.oprofile_cpu_type	= "ppc64/power5",
+		.oprofile_model		= &op_model_power4,
+#endif
 	},
 	{	/* BE DD1.x */
 		.pvr_mask		= 0xffff0000,
@@ -239,6 +302,7 @@ struct cpu_spec	cpu_specs[] = {
 		.cpu_user_features	= COMMON_USER_PPC64,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
+		.num_pmcs		= 6,
 		.cpu_setup		= __setup_cpu_power4,
 	}
 };