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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-05-21 12:41:17 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-05-21 12:41:17 -0700 |
commit | e60b9a0346ee08af4715ee5b2d82f705fbe6e309 (patch) | |
tree | 886e1be2a283806e1dc940b7379a5a6e4683a97b /arch/s390/include/asm/barrier.h | |
parent | 9daeaa370526df1c19eba4780247bb7155541e38 (diff) | |
parent | a7475afd530e6bf81c9025b0134dd1c7c6f1a219 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 updates from Martin Schwidefsky:
"Just a random collection of bug-fixes and cleanups, nothing new in
this merge request."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: (46 commits)
s390/ap: Fix wrong or missing comments
s390/ap: move receive callback to message struct
s390/dasd: re-prioritize partition detection message
s390/qeth: reshuffle initialization
s390/qeth: cleanup drv attr usage
s390/claw: cleanup drv attr usage
s390/lcs: cleanup drv attr usage
s390/ctc: cleanup drv attr usage
s390/ccwgroup: remove ccwgroup_create_from_string
s390/qeth: stop using struct ccwgroup driver for discipline callbacks
s390/qeth: switch to ccwgroup_create_dev
s390/claw: switch to ccwgroup_create_dev
s390/lcs: switch to ccwgroup_create_dev
s390/ctcm: switch to ccwgroup_create_dev
s390/ccwgroup: exploit ccwdev_by_dev_id
s390/ccwgroup: introduce ccwgroup_create_dev
s390: fix race on TIF_MCCK_PENDING
s390/barrier: make use of fast-bcr facility
s390/barrier: cleanup barrier functions
s390/claw: remove "eieio" calls
...
Diffstat (limited to 'arch/s390/include/asm/barrier.h')
-rw-r--r-- | arch/s390/include/asm/barrier.h | 37 |
1 files changed, 20 insertions, 17 deletions
diff --git a/arch/s390/include/asm/barrier.h b/arch/s390/include/asm/barrier.h index 451273ad4d3..10a50880294 100644 --- a/arch/s390/include/asm/barrier.h +++ b/arch/s390/include/asm/barrier.h @@ -11,25 +11,28 @@ * Force strict CPU ordering. * And yes, this is required on UP too when we're talking * to devices. - * - * This is very similar to the ppc eieio/sync instruction in that is - * does a checkpoint syncronisation & makes sure that - * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ). */ -#define eieio() asm volatile("bcr 15,0" : : : "memory") -#define SYNC_OTHER_CORES(x) eieio() -#define mb() eieio() -#define rmb() eieio() -#define wmb() eieio() -#define read_barrier_depends() do { } while(0) -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#define smp_mb__before_clear_bit() smp_mb() -#define smp_mb__after_clear_bit() smp_mb() +static inline void mb(void) +{ +#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES + /* Fast-BCR without checkpoint synchronization */ + asm volatile("bcr 14,0" : : : "memory"); +#else + asm volatile("bcr 15,0" : : : "memory"); +#endif +} + +#define rmb() mb() +#define wmb() mb() +#define read_barrier_depends() do { } while(0) +#define smp_mb() mb() +#define smp_rmb() rmb() +#define smp_wmb() wmb() +#define smp_read_barrier_depends() read_barrier_depends() +#define smp_mb__before_clear_bit() smp_mb() +#define smp_mb__after_clear_bit() smp_mb() -#define set_mb(var, value) do { var = value; mb(); } while (0) +#define set_mb(var, value) do { var = value; mb(); } while (0) #endif /* __ASM_BARRIER_H */ |