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authorJan Glauber <jang@linux.vnet.ibm.com>2012-11-29 13:05:05 +0100
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2012-11-30 17:47:21 +0100
commit9a4da8a5b109906a64bed5aaeb83bf4edb1f5888 (patch)
tree2788d7c8fe3e90333555435c7539d9f31d2c520e /arch/s390/include/asm/isc.h
parente56e4e87e370a0f121450d52337969aa1be21ff7 (diff)
s390/pci: PCI adapter interrupts for MSI/MSI-X
Support PCI adapter interrupts using the Single-IRQ-mode. Single-IRQ-mode disables an adapter IRQ automatically after delivering it until the SIC instruction enables it again. This is used to reduce the number of IRQs for streaming workloads. Up to 64 MSI handlers can be registered per PCI function. A hash table is used to map interrupt numbers to MSI descriptors. The interrupt vector is scanned using the flogr instruction. Only MSI/MSI-X interrupts are supported, no legacy INTs. Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/include/asm/isc.h')
-rw-r--r--arch/s390/include/asm/isc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/s390/include/asm/isc.h b/arch/s390/include/asm/isc.h
index 5ae606456b0..68d7d68300f 100644
--- a/arch/s390/include/asm/isc.h
+++ b/arch/s390/include/asm/isc.h
@@ -18,6 +18,7 @@
#define CHSC_SCH_ISC 7 /* CHSC subchannels */
/* Adapter interrupts. */
#define QDIO_AIRQ_ISC IO_SCH_ISC /* I/O subchannel in qdio mode */
+#define PCI_ISC 2 /* PCI I/O subchannels */
#define AP_ISC 6 /* adjunct processor (crypto) devices */
/* Functions for registration of I/O interruption subclasses */