diff options
author | Arnd Bergmann <arnd@arndb.de> | 2009-06-12 09:53:47 +0200 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2009-06-12 11:32:58 +0200 |
commit | 5b02ee3d219f9e01b6e9146e25613822cfc2e5ce (patch) | |
tree | 7ce9126738c3cf4b37d67170d0e4b34818c057a9 /arch/sh/boards/mach-se/7780/irq.c | |
parent | 26a28fa4fea5b8c65713aa50c124f76a88c7924d (diff) | |
parent | 8ebf975608aaebd7feb33d77f07ba21a6380e086 (diff) |
asm-generic: merge branch 'master' of torvalds/linux-2.6
Fixes a merge conflict against the x86 tree caused by a fix to
atomic.h which I renamed to atomic_long.h.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/sh/boards/mach-se/7780/irq.c')
-rw-r--r-- | arch/sh/boards/mach-se/7780/irq.c | 27 |
1 files changed, 25 insertions, 2 deletions
diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c index 66ad292c9fc..b8d43b638fc 100644 --- a/arch/sh/boards/mach-se/7780/irq.c +++ b/arch/sh/boards/mach-se/7780/irq.c @@ -12,10 +12,13 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/interrupt.h> -#include <asm/irq.h> -#include <asm/io.h> +#include <linux/irq.h> +#include <linux/io.h> #include <mach-se/mach/se7780.h> +#define INTC_BASE 0xffd00000 +#define INTC_ICR1 (INTC_BASE+0x1c) + /* * Initialize IRQ setting */ @@ -43,4 +46,24 @@ void __init init_se7780_IRQ(void) ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */ + + /* ICR1: detect low level(for 2ndcut) */ + ctrl_outl(0xAAAA0000, INTC_ICR1); + + /* + * FPGA PCISEL register initialize + * + * CPU || SLOT1 | SLOT2 | S-ATA | USB + * ------------------------------------- + * INTA || INTA | INTD | -- | INTB + * ------------------------------------- + * INTB || INTB | INTA | -- | INTC + * ------------------------------------- + * INTC || INTC | INTB | INTA | -- + * ------------------------------------- + * INTD || INTD | INTC | -- | INTA + * ------------------------------------- + */ + ctrl_outw(0x0013, FPGA_PCI_INTSEL1); + ctrl_outw(0xE402, FPGA_PCI_INTSEL2); } |