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authorLinus Torvalds <torvalds@linux-foundation.org>2008-08-01 10:53:43 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-08-01 10:53:43 -0700
commit00e9028a95fb8a4d79f2fb695a853f33ea7d3b57 (patch)
tree2dea2ae498a6ce57de8890e87185aca5e9f3ad2d /arch/sh/include/asm/atomic.h
parent57b1494d2ba544c62673234da6115c21fac27ffc (diff)
parent7cb93181629c613ee2b8f4ffe3446f8003074842 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (28 commits) mm/hugetlb.c must #include <asm/io.h> video: Fix up hp6xx driver build regressions. sh: defconfig updates. sh: Kill off stray mach-rsk7203 reference. serial: sh-sci: Fix up SH7760/SH7780/SH7785 early printk regression. sh: Move out individual boards without mach groups. sh: Make sure AT_SYSINFO_EHDR is exposed to userspace in asm/auxvec.h. sh: Allow SH-3 and SH-5 to use common headers. sh: Provide common CPU headers, prune the SH-2 and SH-2A directories. sh/maple: clean maple bus code sh: More header path fixups for mach dir refactoring. sh: Move out the solution engine headers to arch/sh/include/mach-se/ sh: I2C fix for AP325RXA and Migo-R sh: Shuffle the board directories in to mach groups. sh: dma-sh: Fix up dreamcast dma.h mach path. sh: Switch KBUILD_DEFCONFIG to shx3_defconfig. sh: Add ARCH_DEFCONFIG entries for sh and sh64. sh: Fix compile error of Solution Engine sh: Proper __put_user_asm() size mismatch fix. sh: Stub in a dummy ENTRY_OFFSET for uImage offset calculation. ...
Diffstat (limited to 'arch/sh/include/asm/atomic.h')
-rw-r--r--arch/sh/include/asm/atomic.h89
1 files changed, 89 insertions, 0 deletions
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
new file mode 100644
index 00000000000..c043ef00302
--- /dev/null
+++ b/arch/sh/include/asm/atomic.h
@@ -0,0 +1,89 @@
+#ifndef __ASM_SH_ATOMIC_H
+#define __ASM_SH_ATOMIC_H
+
+/*
+ * Atomic operations that C can't guarantee us. Useful for
+ * resource counting etc..
+ *
+ */
+
+typedef struct { volatile int counter; } atomic_t;
+
+#define ATOMIC_INIT(i) ( (atomic_t) { (i) } )
+
+#define atomic_read(v) ((v)->counter)
+#define atomic_set(v,i) ((v)->counter = (i))
+
+#include <linux/compiler.h>
+#include <asm/system.h>
+
+#if defined(CONFIG_GUSA_RB)
+#include <asm/atomic-grb.h>
+#elif defined(CONFIG_CPU_SH4A)
+#include <asm/atomic-llsc.h>
+#else
+#include <asm/atomic-irq.h>
+#endif
+
+#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
+
+#define atomic_dec_return(v) atomic_sub_return(1,(v))
+#define atomic_inc_return(v) atomic_add_return(1,(v))
+
+/*
+ * atomic_inc_and_test - increment and test
+ * @v: pointer of type atomic_t
+ *
+ * Atomically increments @v by 1
+ * and returns true if the result is zero, or false for all
+ * other cases.
+ */
+#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
+
+#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
+#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
+
+#define atomic_inc(v) atomic_add(1,(v))
+#define atomic_dec(v) atomic_sub(1,(v))
+
+#ifndef CONFIG_GUSA_RB
+static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
+{
+ int ret;
+ unsigned long flags;
+
+ local_irq_save(flags);
+ ret = v->counter;
+ if (likely(ret == old))
+ v->counter = new;
+ local_irq_restore(flags);
+
+ return ret;
+}
+
+static inline int atomic_add_unless(atomic_t *v, int a, int u)
+{
+ int ret;
+ unsigned long flags;
+
+ local_irq_save(flags);
+ ret = v->counter;
+ if (ret != u)
+ v->counter += a;
+ local_irq_restore(flags);
+
+ return ret != u;
+}
+#endif
+
+#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
+#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
+
+/* Atomic operations are already serializing on SH */
+#define smp_mb__before_atomic_dec() barrier()
+#define smp_mb__after_atomic_dec() barrier()
+#define smp_mb__before_atomic_inc() barrier()
+#define smp_mb__after_atomic_inc() barrier()
+
+#include <asm-generic/atomic.h>
+#endif /* __ASM_SH_ATOMIC_H */