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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2010-02-03 14:44:12 +0000
committerPaul Mundt <lethal@linux-sh.org>2010-02-08 09:40:24 +0900
commit623b4ac4bf9e767991c66e29b47dd4b19458fb42 (patch)
tree9cf9c5ef8ac1ab714a35db1baf627fb701a98287 /arch/sh/include/asm/dma-sh.h
parentfc4618575f79eea062cdc51715040e40cd35b71c (diff)
sh: fix Transfer Size calculation in both DMA drivers
Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers do not take into account bits 3:2 of the Transfer Size field in the CHCR register, besides, bit-field defines set bit 2, but the mask only passes bits 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to be fixed too. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/asm/dma-sh.h')
-rw-r--r--arch/sh/include/asm/dma-sh.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
index 78eed3e0bdf..01d2fc72551 100644
--- a/arch/sh/include/asm/dma-sh.h
+++ b/arch/sh/include/asm/dma-sh.h
@@ -83,7 +83,7 @@ static int dmte_irq_map[] __maybe_unused = {
* Define the default configuration for dual address memory-memory transfer.
* The 0x400 value represents auto-request, external->external.
*/
-#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32)
+#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_INDEX2VAL(XMIT_SZ_32BIT))
/* DMA base address */
static u32 dma_base_addr[] __maybe_unused = {