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authorAoi Shinkai <shinkoi2005@gmail.com>2009-06-10 16:15:42 +0000
committerPaul Mundt <lethal@linux-sh.org>2009-06-11 09:31:55 +0300
commit4c7c99788631bab177bd51e15e893be4689bb085 (patch)
tree52e50e0b2a30b31dc8c6460e98279b3c1b47c476 /arch/sh/include/asm/spinlock.h
parentf168dd00a9440a6f644db73bda47718fd12008e4 (diff)
sh: Fix sh4a llsc-based cmpxchg()
This fixes up a typo in the ll/sc based cmpxchg code which apparently wasn't getting a lot of testing due to the swapped old/new pair. With that fixed up, the ll/sc code also starts using it and provides its own atomic_add_unless(). Signed-off-by: Aoi Shinkai <shinkoi2005@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/asm/spinlock.h')
-rw-r--r--arch/sh/include/asm/spinlock.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/include/asm/spinlock.h b/arch/sh/include/asm/spinlock.h
index 60283565f89..a28c9f0053f 100644
--- a/arch/sh/include/asm/spinlock.h
+++ b/arch/sh/include/asm/spinlock.h
@@ -26,7 +26,7 @@
#define __raw_spin_is_locked(x) ((x)->lock <= 0)
#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
#define __raw_spin_unlock_wait(x) \
- do { cpu_relax(); } while ((x)->lock)
+ do { while (__raw_spin_is_locked(x)) cpu_relax(); } while (0)
/*
* Simple spin lock operations. There are two variants, one clears IRQ's