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author | Ingo Molnar <mingo@kernel.org> | 2014-03-11 11:34:27 +0100 |
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committer | Ingo Molnar <mingo@kernel.org> | 2014-03-11 11:34:27 +0100 |
commit | a02ed5e3e05ec5e8af21e645cccc77f3a6480aaf (patch) | |
tree | 95a0df31b0c9b1e0357b8dd378e2eab637970df4 /arch/sh/include/cpu-sh3/cpu/cache.h | |
parent | 2b3942e4bb20ef8ef26515bd958c2df83d9a6210 (diff) | |
parent | 96b3d28bf4b00f62fc8386ff5d487d1830793a3d (diff) |
Merge branch 'sched/urgent' into sched/core
Pick up fixes before queueing up new changes.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/sh/include/cpu-sh3/cpu/cache.h')
-rw-r--r-- | arch/sh/include/cpu-sh3/cpu/cache.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/include/cpu-sh3/cpu/cache.h b/arch/sh/include/cpu-sh3/cpu/cache.h index bee2d81c56b..29700fd88c7 100644 --- a/arch/sh/include/cpu-sh3/cpu/cache.h +++ b/arch/sh/include/cpu-sh3/cpu/cache.h @@ -17,7 +17,7 @@ #define SH_CACHE_COMBINED 4 #define SH_CACHE_ASSOC 8 -#define CCR 0xffffffec /* Address of Cache Control Register */ +#define SH_CCR 0xffffffec /* Address of Cache Control Register */ #define CCR_CACHE_CE 0x01 /* Cache Enable */ #define CCR_CACHE_WT 0x02 /* Write-Through (for P0,U0,P3) (else writeback) */ |