diff options
| author | Rusty Russell <rusty@rustcorp.com.au> | 2008-12-30 08:02:35 +1030 |
|---|---|---|
| committer | Rusty Russell <rusty@rustcorp.com.au> | 2008-12-30 08:02:35 +1030 |
| commit | 33edcf133ba93ecba2e4b6472e97b689895d805c (patch) | |
| tree | 327d7a20acef64005e7c5ccbfa1265be28aeb6ac /arch/sh/include/mach-se/mach/mrshpc.h | |
| parent | be4d638c1597580ed2294d899d9f1a2cd10e462c (diff) | |
| parent | 3c92ec8ae91ecf59d88c798301833d7cf83f2179 (diff) | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/sh/include/mach-se/mach/mrshpc.h')
| -rw-r--r-- | arch/sh/include/mach-se/mach/mrshpc.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/sh/include/mach-se/mach/mrshpc.h b/arch/sh/include/mach-se/mach/mrshpc.h new file mode 100644 index 00000000000..56287ee8563 --- /dev/null +++ b/arch/sh/include/mach-se/mach/mrshpc.h @@ -0,0 +1,52 @@ +#ifndef __MACH_SE_MRSHPC_H +#define __MACH_SE_MRSHPC_H + +#include <linux/io.h> + +static inline void __init mrshpc_setup_windows(void) +{ + if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0) + return; /* Not detected */ + + if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) { + __raw_writew(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */ + } else { + __raw_writew(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */ + } + + /* + * PC-Card window open + * flag == COMMON/ATTRIBUTE/IO + */ + /* common window open */ + __raw_writew(0x8a84, MRSHPC_MW0CR1); + if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) + /* common mode & bus width 16bit SWAP = 1*/ + __raw_writew(0x0b00, MRSHPC_MW0CR2); + else + /* common mode & bus width 16bit SWAP = 0*/ + __raw_writew(0x0300, MRSHPC_MW0CR2); + + /* attribute window open */ + __raw_writew(0x8a85, MRSHPC_MW1CR1); + if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) + /* attribute mode & bus width 16bit SWAP = 1*/ + __raw_writew(0x0a00, MRSHPC_MW1CR2); + else + /* attribute mode & bus width 16bit SWAP = 0*/ + __raw_writew(0x0200, MRSHPC_MW1CR2); + + /* I/O window open */ + __raw_writew(0x8a86, MRSHPC_IOWCR1); + __raw_writew(0x0008, MRSHPC_CDCR); /* I/O card mode */ + if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) + __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/ + else + __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/ + + __raw_writew(0x2000, MRSHPC_ICR); + __raw_writeb(0x00, PA_MRSHPC_MW2 + 0x206); + __raw_writeb(0x42, PA_MRSHPC_MW2 + 0x200); +} + +#endif /* __MACH_SE_MRSHPC_H */ |