diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-16 10:32:02 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-16 10:32:02 -0700 |
commit | b91cba52e9b7b3f1c0037908a192d93a869ca9e5 (patch) | |
tree | bbce7f323c8f52b308af5a152673a75b3e445360 /arch/sh/kernel/cpu/irq/intc2.c | |
parent | 98283bb49c6c8c070ebde9f47489d3e9a83c1323 (diff) | |
parent | e509ac4bbc661052dc73a2e8138800ba77d4ecb9 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (68 commits)
sh: sh-rtc support for SH7709.
sh: Revert __xdiv64_32 size change.
sh: Update r7785rp defconfig.
sh: Export div symbols for GCC 4.2 and ST GCC.
sh: fix race in parallel out-of-tree build
sh: Kill off dead mach.c for hp6xx.
sh: hd64461.h cleanup and added comments.
sh: Update the alignment when 4K stacks are used.
sh: Add a .bss.page_aligned section for 4K stacks.
sh: Don't let SH-4A clobber SH-4 CFLAGS.
sh: Add parport stub for SuperIO ports.
sh: Drop -Wa,-dsp for DSP tuning.
sh: Update dreamcast defconfig.
fb: pvr2fb: A few more __devinit annotations for PCI.
fb: pvr2fb: Fix up section mismatch warnings.
sh: Select IPR-IRQ for SH7091.
sh: Correct __xdiv64_32/div64_32 return value size.
sh: Fix timer-tmu build for SH-3.
sh: Add cpu and mach links to CLEAN_FILES.
sh: Preliminary support for the SH-X3 CPU.
...
Diffstat (limited to 'arch/sh/kernel/cpu/irq/intc2.c')
-rw-r--r-- | arch/sh/kernel/cpu/irq/intc2.c | 63 |
1 files changed, 32 insertions, 31 deletions
diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c index d8e22f4ff0f..cc5221390e0 100644 --- a/arch/sh/kernel/cpu/irq/intc2.c +++ b/arch/sh/kernel/cpu/irq/intc2.c @@ -13,36 +13,31 @@ #include <linux/kernel.h> #include <linux/interrupt.h> #include <linux/io.h> +#include <asm/smp.h> -#if defined(CONFIG_CPU_SUBTYPE_SH7760) -#define INTC2_BASE 0xfe080000 -#define INTC2_INTMSK (INTC2_BASE + 0x40) -#define INTC2_INTMSKCLR (INTC2_BASE + 0x60) -#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \ - defined(CONFIG_CPU_SUBTYPE_SH7785) -#define INTC2_BASE 0xffd40000 -#define INTC2_INTMSK (INTC2_BASE + 0x38) -#define INTC2_INTMSKCLR (INTC2_BASE + 0x3c) -#endif +static inline struct intc2_desc *get_intc2_desc(unsigned int irq) +{ + struct irq_chip *chip = get_irq_chip(irq); + return (void *)((char *)chip - offsetof(struct intc2_desc, chip)); +} static void disable_intc2_irq(unsigned int irq) { struct intc2_data *p = get_irq_chip_data(irq); - ctrl_outl(1 << p->msk_shift, INTC2_INTMSK + p->msk_offset); + struct intc2_desc *d = get_intc2_desc(irq); + + ctrl_outl(1 << p->msk_shift, d->msk_base + p->msk_offset + + (hard_smp_processor_id() * 4)); } static void enable_intc2_irq(unsigned int irq) { struct intc2_data *p = get_irq_chip_data(irq); - ctrl_outl(1 << p->msk_shift, INTC2_INTMSKCLR + p->msk_offset); -} + struct intc2_desc *d = get_intc2_desc(irq); -static struct irq_chip intc2_irq_chip = { - .name = "INTC2", - .mask = disable_intc2_irq, - .unmask = enable_intc2_irq, - .mask_ack = disable_intc2_irq, -}; + ctrl_outl(1 << p->msk_shift, d->mskclr_base + p->msk_offset + + (hard_smp_processor_id() * 4)); +} /* * Setup an INTC2 style interrupt. @@ -56,30 +51,36 @@ static struct irq_chip intc2_irq_chip = { * * in the intc2_data table. */ -void make_intc2_irq(struct intc2_data *table, unsigned int nr_irqs) +void register_intc2_controller(struct intc2_desc *desc) { int i; - for (i = 0; i < nr_irqs; i++) { + desc->chip.mask = disable_intc2_irq; + desc->chip.unmask = enable_intc2_irq; + desc->chip.mask_ack = disable_intc2_irq; + + for (i = 0; i < desc->nr_irqs; i++) { unsigned long ipr, flags; - struct intc2_data *p = table + i; + struct intc2_data *p = desc->intc2_data + i; disable_irq_nosync(p->irq); - /* Set the priority level */ - local_irq_save(flags); + if (desc->prio_base) { + /* Set the priority level */ + local_irq_save(flags); - ipr = ctrl_inl(INTC2_BASE + p->ipr_offset); - ipr &= ~(0xf << p->ipr_shift); - ipr |= p->priority << p->ipr_shift; - ctrl_outl(ipr, INTC2_BASE + p->ipr_offset); + ipr = ctrl_inl(desc->prio_base + p->ipr_offset); + ipr &= ~(0xf << p->ipr_shift); + ipr |= p->priority << p->ipr_shift; + ctrl_outl(ipr, desc->prio_base + p->ipr_offset); - local_irq_restore(flags); + local_irq_restore(flags); + } - set_irq_chip_and_handler_name(p->irq, &intc2_irq_chip, + set_irq_chip_and_handler_name(p->irq, &desc->chip, handle_level_irq, "level"); set_irq_chip_data(p->irq, p); - enable_intc2_irq(p->irq); + disable_intc2_irq(p->irq); } } |