diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2010-11-01 12:18:48 -0400 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-11-09 16:40:00 +0900 |
| commit | 16b259203c513ed28bd31cc9a981e0d3ad517943 (patch) | |
| tree | d29600ee92f96a8f9bcf9e3d91e001ea8e09015c /arch/sh/kernel/cpu/sh2a/clock-sh7206.c | |
| parent | a7bcf21e60c73cb7f7c13fad928967d7e47c3cac (diff) | |
sh: migrate SH_CLK_MD to mode pin API.
This kills off the hardcoded SH_CLK_MD introduced by the SH-2 boards and
converts over to the mode pin API.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh2a/clock-sh7206.c')
| -rw-r--r-- | arch/sh/kernel/cpu/sh2a/clock-sh7206.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c index b27a5e2687a..3c314d7cd6e 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c @@ -22,19 +22,11 @@ static const int pll1rate[]={1,2,3,4,6,8}; static const int pfc_divisors[]={1,2,3,4,6,8,12}; #define ifc_divisors pfc_divisors -#if (CONFIG_SH_CLK_MD == 2) -#define PLL2 (4) -#elif (CONFIG_SH_CLK_MD == 6) -#define PLL2 (2) -#elif (CONFIG_SH_CLK_MD == 7) -#define PLL2 (1) -#else -#error "Illigal Clock Mode!" -#endif +static unsigned int pll2_mult; static void master_clk_init(struct clk *clk) { - clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; + clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; } static struct clk_ops sh7206_master_clk_ops = { @@ -79,7 +71,13 @@ static struct clk_ops *sh7206_clk_ops[] = { void __init arch_init_clk_ops(struct clk_ops **ops, int idx) { + if (test_mode_pin(MODE_PIN2 | MODE_PIN1 | MODE_PIN0)) + pll2_mult = 1; + else if (test_mode_pin(MODE_PIN2 | MODE_PIN1)) + pll2_mult = 2; + else if (test_mode_pin(MODE_PIN1)) + pll2_mult = 4; + if (idx < ARRAY_SIZE(sh7206_clk_ops)) *ops = sh7206_clk_ops[idx]; } - |