diff options
| author | Paul Mackerras <paulus@samba.org> | 2008-01-31 11:25:51 +1100 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2008-01-31 11:25:51 +1100 |
| commit | bd45ac0c5daae35e7c71138172e63df5cf644cf6 (patch) | |
| tree | 5eb5a599bf6a9d7a8a34e802db932aa9e9555de4 /arch/sh/kernel/cpu/sh2a/probe.c | |
| parent | 4eece4ccf997c0e6d8fdad3d842e37b16b8d705f (diff) | |
| parent | 5bdeae46be6dfe9efa44a548bd622af325f4bdb4 (diff) | |
Merge branch 'linux-2.6'
Diffstat (limited to 'arch/sh/kernel/cpu/sh2a/probe.c')
| -rw-r--r-- | arch/sh/kernel/cpu/sh2a/probe.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c index 6d02465704b..6910e266446 100644 --- a/arch/sh/kernel/cpu/sh2a/probe.c +++ b/arch/sh/kernel/cpu/sh2a/probe.c @@ -3,25 +3,36 @@ * * CPU Subtype Probing for SH-2A. * - * Copyright (C) 2004, 2005 Paul Mundt + * Copyright (C) 2004 - 2007 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ - #include <linux/init.h> #include <asm/processor.h> #include <asm/cache.h> int __init detect_cpu_and_cache_system(void) { - /* Just SH7206 for now .. */ - boot_cpu_data.type = CPU_SH7206; + /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */ boot_cpu_data.flags |= CPU_HAS_OP32; +#if defined(CONFIG_CPU_SUBTYPE_SH7203) + boot_cpu_data.type = CPU_SH7203; + /* SH7203 has an FPU.. */ + boot_cpu_data.flags |= CPU_HAS_FPU; +#elif defined(CONFIG_CPU_SUBTYPE_SH7263) + boot_cpu_data.type = CPU_SH7263; + boot_cpu_data.flags |= CPU_HAS_FPU; +#elif defined(CONFIG_CPU_SUBTYPE_SH7206) + boot_cpu_data.type = CPU_SH7206; + /* While SH7206 has a DSP.. */ + boot_cpu_data.flags |= CPU_HAS_DSP; +#endif + boot_cpu_data.dcache.ways = 4; - boot_cpu_data.dcache.way_incr = (1 << 11); + boot_cpu_data.dcache.way_incr = (1 << 11); boot_cpu_data.dcache.sets = 128; boot_cpu_data.dcache.entry_shift = 4; boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; @@ -37,4 +48,3 @@ int __init detect_cpu_and_cache_system(void) return 0; } - |