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authorMagnus Damm <damm@igel.co.jp>2007-08-03 14:23:35 +0900
committerPaul Mundt <lethal@linux-sh.org>2007-09-21 11:57:47 +0900
commitd59645d6ba67337ff09369d9da4fc47f7dc361cc (patch)
treecd5e81d64ec7e6a4ea22a6f2e45ddf27e1140567 /arch/sh/kernel/cpu/sh4
parentad89f87a84040a57c4a78ca2759b364f72f423ab (diff)
sh: intc - remove redundant irq code for sh03, snapgear and titan
This patch removes redundant board specific interrupt code for boards using sh775x processors and 4 IRQ lines in "Individual Interrupt Mode" aka IRLM. Three boards are affected: sh03, snapgear and titan. The right way to do this is to use cpu specific code provided by intc. A nice side effect is that sh03 now compiles, board not BROKEN any more. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4')
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index f2286de22bd..e313be24984 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -282,13 +282,19 @@ void __init plat_irq_setup(void)
#define INTC_ICR 0xffd00000UL
#define INTC_ICR_IRLM (1<<7)
-/* enable individual interrupt mode for external interupts */
-void __init ipr_irq_enable_irlm(void)
+void __init plat_irq_setup_pins(int mode)
{
#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7091)
BUG(); /* impossible to mask interrupts on SH7750 and SH7091 */
+ return;
#endif
- register_intc_controller(&intc_desc_irlm);
- ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+ switch (mode) {
+ case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
+ ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+ register_intc_controller(&intc_desc_irlm);
+ break;
+ default:
+ BUG();
+ }
}