sh: Tidy up sh7786 pinmux table.

Formatting and typo fix.

Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 39 insertions, 145 deletions

diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
index 54ca6645d5a..4229e0724c8 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
@@ -149,150 +149,44 @@ enum {
 	PINMUX_FUNCTION_END,
 
 	PINMUX_MARK_BEGIN,
-	CDE_MARK,
-	ETH_MAGIC_MARK,
-	DISP_MARK,
-	ETH_LINK_MARK,
-	DR5_MARK,
-	ETH_TX_ER_MARK,
-	DR4_MARK,
-	ETH_TX_EN_MARK,
-	DR3_MARK,
-	ETH_TXD3_MARK,
-	DR2_MARK,
-	ETH_TXD2_MARK,
-	DR1_MARK,
-	ETH_TXD1_MARK,
-	DR0_MARK,
-	ETH_TXD0_MARK,
-
-	VSYNC_MARK,
-	HSPI_CLK_MARK,
-	ODDF_MARK,
-	HSPI_CS_MARK,
-	DG5_MARK,
-	ETH_MDIO_MARK,
-	DG4_MARK,
-	ETH_RX_CLK_MARK,
-	DG3_MARK,
-	ETH_MDC_MARK,
-	DG2_MARK,
-	ETH_COL_MARK,
-	DG1_MARK,
-	ETH_TX_CLK_MARK,
-	DG0_MARK,
-	ETH_CRS_MARK,
-
-	DCLKIN_MARK,
-	HSPI_RX_MARK,
-	HSYNC_MARK,
-	HSPI_TX_MARK,
-	DB5_MARK,
-	ETH_RXD3_MARK,
-	DB4_MARK,
-	ETH_RXD2_MARK,
-	DB3_MARK,
-	ETH_RXD1_MARK,
-	DB2_MARK,
-	ETH_RXD0_MARK,
-	DB1_MARK,
-	ETH_RX_DV_MARK,
-	DB0_MARK,
-	ETH_RX_ER_MARK,
-
-	DCLKOUT_MARK,
-	SCIF1_SLK_MARK,
-	SCIF1_RXD_MARK,
-	SCIF1_TXD_MARK,
-	DACK1_MARK,
-	BACK_MARK,
-	FALE_MARK,
-	DACK0_MARK,
-	FCLE_MARK,
-	DREQ1_MARK,
-	BREQ_MARK,
-	USB_OVC1_MARK,
-	DREQ0_MARK,
-	USB_OVC0_MARK,
-
-	USB_PENC1_MARK,
-	USB_PENC0_MARK,
-
-	HAC1_SDOUT_MARK,
-	SSI1_SDATA_MARK,
-	SDIF1CMD_MARK,
-	HAC1_SDIN_MARK,
-	SSI1_SCK_MARK,
-	SDIF1CD_MARK,
-	HAC1_SYNC_MARK,
-	SSI1_WS_MARK,
-	SDIF1WP_MARK,
-	HAC1_BITCLK_MARK,
-	SSI1_CLK_MARK,
-	SDIF1CLK_MARK,
-	HAC0_SDOUT_MARK,
-	SSI0_SDATA_MARK,
-	SDIF1D3_MARK,
-	HAC0_SDIN_MARK,
-	SSI0_SCK_MARK,
-	SDIF1D2_MARK,
-	HAC0_SYNC_MARK,
-	SSI0_WS_MARK,
-	SDIF1D1_MARK,
-	HAC0_BITCLK_MARK,
-	SSI0_CLK_MARK,
-	SDIF1D0_MARK,
-
-	SCIF3_SCK_MARK,
-	SSI2_SDATA_MARK,
-	SCIF3_RXD_MARK,
-	TCLK_MARK,
-	SSI2_SCK_MARK,
-	SCIF3_TXD_MARK,
+	DCLKIN_MARK, DCLKOUT_MARK, ODDF_MARK,
+	VSYNC_MARK, HSYNC_MARK, CDE_MARK, DISP_MARK,
+	DR0_MARK, DR1_MARK, DR2_MARK, DR3_MARK, DR4_MARK, DR5_MARK,
+	DG0_MARK, DG1_MARK, DG2_MARK, DG3_MARK, DG4_MARK, DG5_MARK,
+	DB0_MARK, DB1_MARK, DB2_MARK, DB3_MARK, DB4_MARK, DB5_MARK,
+	ETH_MAGIC_MARK, ETH_LINK_MARK, ETH_TX_ER_MARK, ETH_TX_EN_MARK,
+	ETH_MDIO_MARK, ETH_RX_CLK_MARK, ETH_MDC_MARK, ETH_COL_MARK,
+	ETH_TX_CLK_MARK, ETH_CRS_MARK, ETH_RX_DV_MARK, ETH_RX_ER_MARK,
+	ETH_TXD3_MARK, ETH_TXD2_MARK, ETH_TXD1_MARK, ETH_TXD0_MARK,
+	ETH_RXD3_MARK, ETH_RXD2_MARK, ETH_RXD1_MARK, ETH_RXD0_MARK,
+	HSPI_CLK_MARK, HSPI_CS_MARK, HSPI_RX_MARK, HSPI_TX_MARK,
+	SCIF0_CTS_MARK, SCIF0_RTS_MARK,
+	SCIF0_SCK_MARK, SCIF0_RXD_MARK, SCIF0_TXD_MARK,
+	SCIF1_SCK_MARK, SCIF1_RXD_MARK, SCIF1_TXD_MARK,
+	SCIF3_SCK_MARK, SCIF3_RXD_MARK, SCIF3_TXD_MARK,
+	SCIF4_SCK_MARK, SCIF4_RXD_MARK, SCIF4_TXD_MARK,
+	SCIF5_SCK_MARK, SCIF5_RXD_MARK, SCIF5_TXD_MARK,
+	BREQ_MARK, IOIS16_MARK, CE2B_MARK, CE2A_MARK, BACK_MARK,
+	FALE_MARK, FRB_MARK, FSTATUS_MARK,
+	FSE_MARK, FCLE_MARK,
+	DACK0_MARK, DACK1_MARK, DACK2_MARK, DACK3_MARK,
+	DREQ0_MARK, DREQ1_MARK, DREQ2_MARK, DREQ3_MARK,
+	DRAK0_MARK, DRAK1_MARK, DRAK2_MARK, DRAK3_MARK,
+	USB_OVC1_MARK, USB_OVC0_MARK,
+	USB_PENC1_MARK, USB_PENC0_MARK,
 	HAC_RES_MARK,
-	SSI2_WS_MARK,
-
-	DACK3_MARK,
-	SDIF0CMD_MARK,
-	DACK2_MARK,
-	SDIF0CD_MARK,
-	DREQ3_MARK,
-	SDIF0WP_MARK,
-	SCIF0_CTS_MARK,
-	DREQ2_MARK,
-	SDIF0CLK_MARK,
-	SCIF0_RTS_MARK,
-	IRL7_MARK,
-	SDIF0D3_MARK,
-	SCIF0_SCK_MARK,
-	IRL6_MARK,
-	SDIF0D2_MARK,
-	SCIF0_RXD_MARK,
-	IRL5_MARK,
-	SDIF0D1_MARK,
-	SCIF0_TXD_MARK,
-	IRL4_MARK,
-	SDIF0D0_MARK,
-
-	SCIF5_SCK_MARK,
-	FRB_MARK,
-	SCIF5_RXD_MARK,
-	IOIS16_MARK,
-	SCIF5_TXD_MARK,
-	CE2B_MARK,
-	DRAK3_MARK,
-	CE2A_MARK,
-	SCIF4_SCK_MARK,
-	DRAK2_MARK,
-	SSI3_WS_MARK,
-	SCIF4_RXD_MARK,
-	DRAK1_MARK,
-	SSI3_SDATA_MARK,
-	FSTATUS_MARK,
-	SCIF4_TXD_MARK,
-	DRAK0_MARK,
-	SSI3_SCK_MARK,
-	FSE_MARK,
+	HAC1_SDOUT_MARK, HAC1_SDIN_MARK, HAC1_SYNC_MARK, HAC1_BITCLK_MARK,
+	HAC0_SDOUT_MARK, HAC0_SDIN_MARK, HAC0_SYNC_MARK, HAC0_BITCLK_MARK,
+	SSI0_SDATA_MARK, SSI0_SCK_MARK, SSI0_WS_MARK, SSI0_CLK_MARK,
+	SSI1_SDATA_MARK, SSI1_SCK_MARK, SSI1_WS_MARK, SSI1_CLK_MARK,
+	SSI2_SDATA_MARK, SSI2_SCK_MARK, SSI2_WS_MARK,
+	SSI3_SDATA_MARK, SSI3_SCK_MARK, SSI3_WS_MARK,
+	SDIF1CMD_MARK, SDIF1CD_MARK, SDIF1WP_MARK, SDIF1CLK_MARK,
+	SDIF1D3_MARK, SDIF1D2_MARK, SDIF1D1_MARK, SDIF1D0_MARK,
+	SDIF0CMD_MARK, SDIF0CD_MARK, SDIF0WP_MARK, SDIF0CLK_MARK,
+	SDIF0D3_MARK, SDIF0D2_MARK, SDIF0D1_MARK, SDIF0D0_MARK,
+	TCLK_MARK,
+	IRL7_MARK, IRL6_MARK, IRL5_MARK, IRL4_MARK,
 	PINMUX_MARK_END,
 };
 
@@ -433,7 +327,7 @@ static pinmux_enum_t pinmux_data[] = {
 
 	/* PD FN */
 	PINMUX_DATA(DCLKOUT_MARK,	PD7_FN),
-	PINMUX_DATA(SCIF1_SLK_MARK,	PD6_FN),
+	PINMUX_DATA(SCIF1_SCK_MARK,	PD6_FN),
 	PINMUX_DATA(SCIF1_RXD_MARK,	PD5_FN),
 	PINMUX_DATA(SCIF1_TXD_MARK,	PD4_FN),
 	PINMUX_DATA(DACK1_MARK,		P1MSEL13_1, P1MSEL12_0, PD3_FN),
@@ -661,7 +555,7 @@ static struct pinmux_gpio pinmux_gpios[] = {
 	PINMUX_GPIO(GPIO_FN_DB0,		DB0_MARK),
 	PINMUX_GPIO(GPIO_FN_ETH_RX_ER,		ETH_RX_ER_MARK),
 	PINMUX_GPIO(GPIO_FN_DCLKOUT,		DCLKOUT_MARK),
-	PINMUX_GPIO(GPIO_FN_SCIF1_SLK,		SCIF1_SLK_MARK),
+	PINMUX_GPIO(GPIO_FN_SCIF1_SCK,		SCIF1_SCK_MARK),
 	PINMUX_GPIO(GPIO_FN_SCIF1_RXD,		SCIF1_RXD_MARK),
 	PINMUX_GPIO(GPIO_FN_SCIF1_TXD,		SCIF1_TXD_MARK),
 	PINMUX_GPIO(GPIO_FN_DACK1,		DACK1_MARK),