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authorLinus Torvalds <torvalds@linux-foundation.org>2008-12-28 11:39:19 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2008-12-28 11:39:19 -0800
commit81d6e59dabb1ae0c782e9eb7e3d88f699d25b314 (patch)
tree532afd14c119f1c95206ef0d23db9c4c26a0aa34 /arch/sh/kernel/head_32.S
parent4a6908a3a050aacc9c3a2f36b276b46c0629ad91 (diff)
parent59de580af1c2fd671b0cb27c41ff958859ae5288 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (132 commits) sh: oprofile: Fix up the module build. sh: add UIO support for JPU on SH7722. serial: sh-sci: Fix up port pinmux for SH7366. sh: mach-rsk: Use uImage generation by default for rsk7201/7203. sh: mach-sh03: Fix up pata_platform build breakage. sh: enable deferred io LCDC on Migo-R video: sh_mobile_lcdcfb deferred io support video: deferred io with physically contiguous memory video: deferred io cleanup video: fix deferred io fsync() sh: add LCDC interrupt configuration to AP325 and Migo-R sh_mobile_lcdc: use FB_SYS helpers instead of FB_CFB sh: split coherent pages sh: dma: Kill off ISA DMA wrapper. sh: Conditionalize the code dumper on CONFIG_DUMP_CODE. sh: Kill off the unused SH_ALPHANUMERIC debug option. sh: Enable skipping of bss on debug platforms for sh32 also. doc: Update sh cpufreq documentation. sh: mrshpc_setup_windows() needs to be inline. serial: sh-sci: sci_poll_get_char() is only used by CONFIG_CONSOLE_POLL. ...
Diffstat (limited to 'arch/sh/kernel/head_32.S')
-rw-r--r--arch/sh/kernel/head_32.S12
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index ae0a382a82e..788605ff708 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -80,8 +80,14 @@ ENTRY(_stext)
mov.l 7f, r0
ldc r0, r7_bank ! ... and initial thread_info
#endif
-
- ! Clear BSS area
+
+#ifndef CONFIG_SH_NO_BSS_INIT
+ /*
+ * Don't clear BSS if running on slow platforms such as an RTL simulation,
+ * remote memory via SHdebug link, etc. For these the memory can be guaranteed
+ * to be all zero on boot anyway.
+ */
+ ! Clear BSS area
#ifdef CONFIG_SMP
mov.l 3f, r0
cmp/eq #0, r0 ! skip clear if set to zero
@@ -97,6 +103,8 @@ ENTRY(_stext)
mov.l r0,@-r2
10:
+#endif
+
! Additional CPU initialization
mov.l 6f, r0
jsr @r0