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authorDave Airlie <airlied@redhat.com>2011-03-16 11:34:41 +1000
committerDave Airlie <airlied@redhat.com>2011-03-16 11:34:41 +1000
commit38f1cff0863809587b5fd10ecd0c24c8b543a48c (patch)
tree7cf6eb88cdc938c3683209d38311e711a1119400 /arch/sh/lib/delay.c
parent4819d2e4310796c4e9eef674499af9b9caf36b5a (diff)
parent5359533801e3dd3abca5b7d3d985b0b33fd9fe8b (diff)
Merge commit '5359533801e3dd3abca5b7d3d985b0b33fd9fe8b' into drm-core-next
This commit changed an internal radeon structure, that meant a new driver in -next had to be fixed up, merge in the commit and fix up the driver. Also fixes a trivial nouveau merge. Conflicts: drivers/gpu/drm/nouveau/nouveau_mem.c
Diffstat (limited to 'arch/sh/lib/delay.c')
-rw-r--r--arch/sh/lib/delay.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c
index faa8f86c0db..0901b2f14e1 100644
--- a/arch/sh/lib/delay.c
+++ b/arch/sh/lib/delay.c
@@ -10,6 +10,16 @@
void __delay(unsigned long loops)
{
__asm__ __volatile__(
+ /*
+ * ST40-300 appears to have an issue with this code,
+ * normally taking two cycles each loop, as with all
+ * other SH variants. If however the branch and the
+ * delay slot straddle an 8 byte boundary, this increases
+ * to 3 cycles.
+ * This align directive ensures this doesn't occur.
+ */
+ ".balign 8\n\t"
+
"tst %0, %0\n\t"
"1:\t"
"bf/s 1b\n\t"