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authorGrant Likely <grant.likely@secretlab.ca>2011-03-12 01:25:53 -0700
committerGrant Likely <grant.likely@secretlab.ca>2011-03-12 01:25:53 -0700
commit9c3c8afccb6a163fd2be739f511e863eab668702 (patch)
treee587a5377ada98fed8cfa6c8ee63125361f2818a /arch/sh/lib/delay.c
parent290293eda2c6dd368476d71433bdef07c39a6829 (diff)
parenta5abba989deceb731047425812d268daf7536575 (diff)
Merge commit 'v2.6.38-rc8' into spi/next
Conflicts: drivers/spi/pxa2xx_spi_pci.c
Diffstat (limited to 'arch/sh/lib/delay.c')
-rw-r--r--arch/sh/lib/delay.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c
index faa8f86c0db..0901b2f14e1 100644
--- a/arch/sh/lib/delay.c
+++ b/arch/sh/lib/delay.c
@@ -10,6 +10,16 @@
void __delay(unsigned long loops)
{
__asm__ __volatile__(
+ /*
+ * ST40-300 appears to have an issue with this code,
+ * normally taking two cycles each loop, as with all
+ * other SH variants. If however the branch and the
+ * delay slot straddle an 8 byte boundary, this increases
+ * to 3 cycles.
+ * This align directive ensures this doesn't occur.
+ */
+ ".balign 8\n\t"
+
"tst %0, %0\n\t"
"1:\t"
"bf/s 1b\n\t"