diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-27 08:49:07 -0700 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-27 08:49:07 -0700 |
commit | b98adfccdf5f8dd34ae56a2d5adbe2c030bd4674 (patch) | |
tree | 1807a029520f550dd4f90c95ad0063bceb00d645 /arch/sh/mm/cache-sh7705.c | |
parent | ba21fe71725f94792330ebc3034ef2b35a36276f (diff) | |
parent | 33573c0e3243aaa38b6ad96942de85a1b713c2ff (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (108 commits)
sh: Fix occasional flush_cache_4096() stack corruption.
sh: Calculate shm alignment at runtime.
sh: dma-mapping compile fixes.
sh: Initial vsyscall page support.
sh: Clean up PAGE_SIZE definition for assembly use.
sh: Selective flush_cache_mm() flushing.
sh: More intelligent entry_mask/way_size calculation.
sh: Support for L2 cache on newer SH-4A CPUs.
sh: Update kexec support for API changes.
sh: Optimized readsl()/writesl() support.
sh: Report movli.l/movco.l capabilities.
sh: CPU flags in AT_HWCAP in ELF auxvt.
sh: Add support for 4K stacks.
sh: Enable /proc/kcore support.
sh: stack debugging support.
sh: select CONFIG_EMBEDDED.
sh: machvec rework.
sh: Solution Engine SH7343 board support.
sh: SH7710VoIPGW board support.
sh: Enable verbose BUG() support.
...
Diffstat (limited to 'arch/sh/mm/cache-sh7705.c')
-rw-r--r-- | arch/sh/mm/cache-sh7705.c | 19 |
1 files changed, 6 insertions, 13 deletions
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c index bf94eedb0a8..045abdf078f 100644 --- a/arch/sh/mm/cache-sh7705.c +++ b/arch/sh/mm/cache-sh7705.c @@ -9,7 +9,6 @@ * for more details. * */ - #include <linux/init.h> #include <linux/mman.h> #include <linux/mm.h> @@ -25,14 +24,10 @@ #include <asm/mmu_context.h> #include <asm/cacheflush.h> -/* The 32KB cache on the SH7705 suffers from the same synonym problem - * as SH4 CPUs */ - -#define __pte_offset(address) \ - ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) -#define pte_offset(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \ - __pte_offset(address)) - +/* + * The 32KB cache on the SH7705 suffers from the same synonym problem + * as SH4 CPUs + */ static inline void cache_wback_all(void) { unsigned long ways, waysize, addrstart; @@ -73,7 +68,6 @@ void flush_icache_range(unsigned long start, unsigned long end) __flush_wback_region((void *)start, end - start); } - /* * Writeback&Invalidate the D-cache of the page */ @@ -128,7 +122,6 @@ static void __flush_dcache_page(unsigned long phys) local_irq_restore(flags); } - /* * Write back & invalidate the D-cache of the page. * (To avoid "alias" issues) @@ -186,7 +179,8 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, * * ADDRESS: Virtual Address (U0 address) */ -void flush_cache_page(struct vm_area_struct *vma, unsigned long address, unsigned long pfn) +void flush_cache_page(struct vm_area_struct *vma, unsigned long address, + unsigned long pfn) { __flush_dcache_page(pfn << PAGE_SHIFT); } @@ -203,4 +197,3 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page) { __flush_purge_region(page_address(page), PAGE_SIZE); } - |