Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (262 commits)
  sh: mach-ecovec24: Add user debug switch support
  sh: Kill off unused se_skipped in alignment trap notification code.
  sh: Wire up HAVE_SYSCALL_TRACEPOINTS.
  video: sh_mobile_lcdcfb: use both register sets for display panning
  video: sh_mobile_lcdcfb: implement display panning
  sh: Fix up sh7705 flush_dcache_page() build.
  sh: kfr2r09: document the PLL/FLL <-> RF relationship.
  sh: mach-ecovec24: need asm/clock.h.
  sh: mach-ecovec24: deassert usb irq on boot.
  sh: Add KEYSC support for EcoVec24
  sh: add kycr2_delay for sh_keysc
  sh: cpufreq: Include CPU id in info messages.
  sh: multi-evt support for SH-X3 proto CPU.
  sh: clkfwk: remove bogus set_bus_parent() from SH7709.
  sh: Fix the indication point of the liquid crystal of AP-325RXA(AP3300)
  sh: Add EcoVec24 romImage defconfig
  sh: USB disable process is needed if romImage boot for EcoVec24
  sh: EcoVec24: add HIZA setting for LED
  sh: EcoVec24: write MAC address in boot
  sh: Add romImage support for EcoVec24
  ...

1 files changed, 11 insertions, 26 deletions

diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index f0c7b7397fa..8cf550e2570 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -15,34 +15,16 @@
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
-void update_mmu_cache(struct vm_area_struct * vma,
-		      unsigned long address, pte_t pte)
+void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
 {
-	unsigned long flags;
-	unsigned long pteval;
-	unsigned long vpn;
+	unsigned long flags, pteval, vpn;
 
-	/* Ptrace may call this routine. */
+	/*
+	 * Handle debugger faulting in for debugee.
+	 */
 	if (vma && current->active_mm != vma->vm_mm)
 		return;
 
-#ifndef CONFIG_CACHE_OFF
-	{
-		unsigned long pfn = pte_pfn(pte);
-
-		if (pfn_valid(pfn)) {
-			struct page *page = pfn_to_page(pfn);
-
-			if (!test_bit(PG_mapped, &page->flags)) {
-				unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
-				__flush_wback_region((void *)P1SEGADDR(phys),
-						     PAGE_SIZE);
-				__set_bit(PG_mapped, &page->flags);
-			}
-		}
-	}
-#endif
-
 	local_irq_save(flags);
 
 	/* Set PTEH register */
@@ -61,9 +43,12 @@ void update_mmu_cache(struct vm_area_struct * vma,
 	 */
 	ctrl_outl(pte.pte_high, MMU_PTEA);
 #else
-	if (cpu_data->flags & CPU_HAS_PTEA)
-		/* TODO: make this look less hacky */
-		ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
+	if (cpu_data->flags & CPU_HAS_PTEA) {
+		/* The last 3 bits and the first one of pteval contains
+		 * the PTEA timing control and space attribute bits
+		 */
+		ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA);
+	}
 #endif
 
 	/* Set PTEL register */