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author | David S. Miller <davem@davemloft.net> | 2012-09-06 18:13:58 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2012-09-06 18:13:58 -0700 |
commit | 4f93d21d2563353df813ee049f6489f340389aab (patch) | |
tree | d12bf9282a121c9a326bce958bdc9736b005f5cc /arch/sparc/include/asm/mdesc.h | |
parent | 699871bc943be418be13208526bc613d68017fab (diff) |
sparc64: Support 2GB and 16GB page sizes for kernel linear mappings.
SPARC-T4 supports 2GB pages.
So convert kpte_linear_bitmap into an array of 2-bit values which
index into kern_linear_pte_xor.
Now kern_linear_pte_xor is used for 4 page size aligned regions,
4MB, 256MB, 2GB, and 16GB respectively.
Enabling 2GB pages is currently hardcoded using a check against
sun4v_chip_type. In the future this will be done more cleanly
by interrogating the machine description which is the correct
way to determine this kind of thing.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include/asm/mdesc.h')
0 files changed, 0 insertions, 0 deletions