diff options
| author | David S. Miller <davem@davemloft.net> | 2008-11-23 21:55:29 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-12-04 09:17:02 -0800 |
| commit | b4f4372f96e0573d752d9e45beda02fabf716cc8 (patch) | |
| tree | 641798dfe78c1407908c68b64427cd55cdc18b34 /arch/sparc/include/asm/pil.h | |
| parent | c6afec5e4d323e7b88a7d6e291a5aa021a8fcb7d (diff) | |
sparc64: Make %pil level 15 a pseudo-NMI.
So that we can profile code even in a local_irq_disable() section,
only write 14 (instead of 15) into the %pil register to disable IRQs.
This allows PIL level 15 to serve as a pseudo NMI.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include/asm/pil.h')
| -rw-r--r-- | arch/sparc/include/asm/pil.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/sparc/include/asm/pil.h b/arch/sparc/include/asm/pil.h index 71819bb943f..d573820c0ff 100644 --- a/arch/sparc/include/asm/pil.h +++ b/arch/sparc/include/asm/pil.h @@ -10,7 +10,12 @@ * * In fact any XCALL which has to etrap/rtrap has a problem because * it is difficult to prevent rtrap from running BH's, and that would - * need to be done if the XCALL arrived while %pil==15. + * need to be done if the XCALL arrived while %pil==PIL_NORMAL_MAX. + * + * Finally, in order to handle profiling events even when a + * local_irq_disable() is in progress, we only disable up to level 14 + * interrupts. Profile counter overflow interrupts arrive at level + * 15. */ #define PIL_SMP_CALL_FUNC 1 #define PIL_SMP_RECEIVE_SIGNAL 2 @@ -18,5 +23,7 @@ #define PIL_SMP_CTX_NEW_VERSION 4 #define PIL_DEVICE_IRQ 5 #define PIL_SMP_CALL_FUNC_SNGL 6 +#define PIL_NORMAL_MAX 14 +#define PIL_NMI 15 #endif /* !(_SPARC64_PIL_H) */ |