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authorDavid S. Miller <davem@davemloft.net>2012-08-16 21:16:22 -0700
committerDavid S. Miller <davem@davemloft.net>2012-08-18 23:04:08 -0700
commit0bab20ba4c95f56355c24a0b9f03eb486c2a267d (patch)
tree906d0ca27a6c62ea01b55e24f7a4c3a7e76a723e /arch/sparc/kernel/nmi.c
parent8c79bfa51101354853f0f5d3b02435cec429da51 (diff)
sparc64: Add 'reg_num' argument to pcr_ops methods.
SPARC-T4 and later have multiple PCR registers, one for each PIC counter. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/nmi.c')
-rw-r--r--arch/sparc/kernel/nmi.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index eb1c1f010a4..95df720a14a 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -109,7 +109,7 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
touched = 1;
else
- pcr_ops->write(PCR_PIC_PRIV);
+ pcr_ops->write(0, PCR_PIC_PRIV);
sum = local_cpu_data().irq0_irqs;
if (__get_cpu_var(nmi_touch)) {
@@ -127,7 +127,7 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
}
if (__get_cpu_var(wd_enabled)) {
write_pic(picl_value(nmi_hz));
- pcr_ops->write(pcr_enable);
+ pcr_ops->write(0, pcr_enable);
}
restore_hardirq_stack(orig_sp);
@@ -166,7 +166,7 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count)
void stop_nmi_watchdog(void *unused)
{
- pcr_ops->write(PCR_PIC_PRIV);
+ pcr_ops->write(0, PCR_PIC_PRIV);
__get_cpu_var(wd_enabled) = 0;
atomic_dec(&nmi_active);
}
@@ -223,10 +223,10 @@ void start_nmi_watchdog(void *unused)
__get_cpu_var(wd_enabled) = 1;
atomic_inc(&nmi_active);
- pcr_ops->write(PCR_PIC_PRIV);
+ pcr_ops->write(0, PCR_PIC_PRIV);
write_pic(picl_value(nmi_hz));
- pcr_ops->write(pcr_enable);
+ pcr_ops->write(0, pcr_enable);
}
static void nmi_adjust_hz_one(void *unused)
@@ -234,10 +234,10 @@ static void nmi_adjust_hz_one(void *unused)
if (!__get_cpu_var(wd_enabled))
return;
- pcr_ops->write(PCR_PIC_PRIV);
+ pcr_ops->write(0, PCR_PIC_PRIV);
write_pic(picl_value(nmi_hz));
- pcr_ops->write(pcr_enable);
+ pcr_ops->write(0, pcr_enable);
}
void nmi_adjust_hz(unsigned int new_hz)