diff options
| author | Sam Ravnborg <sam@ravnborg.org> | 2012-04-16 21:50:49 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2012-04-16 14:36:47 -0700 |
| commit | df2e7f525d88da992021b589d8a412afc15de36c (patch) | |
| tree | f14007e9057fa78cd8b7cec531e4df3d8711bff9 /arch/sparc/kernel/pcic.c | |
| parent | 62f082830d63cf753ed0dab16f8d3b2d0ffc7f43 (diff) | |
sparc32: fix build of pcic
Left-overs for an earlier iteration of the generic clock events patch removed.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Kirill Tkhai <tkhai@yandex.ru>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/pcic.c')
| -rw-r--r-- | arch/sparc/kernel/pcic.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c index 118a3f5806a..f0ec9396a40 100644 --- a/arch/sparc/kernel/pcic.c +++ b/arch/sparc/kernel/pcic.c @@ -722,7 +722,7 @@ static unsigned int pcic_cycles_offset(void) */ count = ((count / HZ) * USECS_PER_JIFFY) / (TICK_TIMER_LIMIT / HZ); - /* Coordinate with the fact that timer_cs rate is 2MHz */ + /* Coordinate with the sparc_config.clock_rate setting */ return count * 2; } @@ -735,10 +735,10 @@ void __init pci_time_init(void) #ifndef CONFIG_SMP /* - * It's in SBUS dimension, because timer_cs is in this dimension. + * The clock_rate is in SBUS dimension. * We take into account this in pcic_cycles_offset() */ - timer_cs_period = SBUS_CLOCK_RATE / HZ; + sparc_config.clock_rate = SBUS_CLOCK_RATE / HZ; sparc_config.features |= FEAT_L10_CLOCKEVENT; #endif sparc_config.features |= FEAT_L10_CLOCKSOURCE; |