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authorJeff Garzik <jeff@garzik.org>2006-06-11 23:04:37 -0400
committerJeff Garzik <jeff@garzik.org>2006-06-11 23:04:37 -0400
commitfec69a97489f961026e24536dbb7b86ac663948c (patch)
tree869713470d81ebc261598489a2711960336c7c37 /arch/sparc/kernel/smp.c
parent1049cb478783c74ca8c99ef70e7d2bf920b9335b (diff)
parent2f9719b61e1fcf7422a016ac4f2420a0cc6ba320 (diff)
Merge branch 'upstream-fixes' into upstream
Conflicts: drivers/scsi/sata_sil24.c
Diffstat (limited to 'arch/sparc/kernel/smp.c')
-rw-r--r--arch/sparc/kernel/smp.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/sparc/kernel/smp.c b/arch/sparc/kernel/smp.c
index a93f5da6855..40b42c88e6a 100644
--- a/arch/sparc/kernel/smp.c
+++ b/arch/sparc/kernel/smp.c
@@ -69,6 +69,17 @@ void __init smp_store_cpu_info(int id)
"clock-frequency", 0);
cpu_data(id).prom_node = cpu_node;
cpu_data(id).mid = cpu_get_hwmid(cpu_node);
+
+ /* this is required to tune the scheduler correctly */
+ /* is it possible to have CPUs with different cache sizes? */
+ if (id == boot_cpu_id) {
+ int cache_line,cache_nlines;
+ cache_line = 0x20;
+ cache_line = prom_getintdefault(cpu_node, "ecache-line-size", cache_line);
+ cache_nlines = 0x8000;
+ cache_nlines = prom_getintdefault(cpu_node, "ecache-nlines", cache_nlines);
+ max_cache_size = cache_line * cache_nlines;
+ }
if (cpu_data(id).mid < 0)
panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);
}