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authorDavid S. Miller <davem@davemloft.net>2006-06-20 01:21:57 -0700
committerDavid S. Miller <davem@davemloft.net>2006-06-20 01:21:57 -0700
commit37cdcd9e82108f9b899f1631f66ade2e45738a6e (patch)
tree452b4a106d767947664b99797640194c7483047e /arch/sparc64/kernel/pci_sun4v.c
parentc6387a48cf5958e43c201fc27a158c328927531a (diff)
[SPARC64]: Kill ino_bucket->pil
And reuse that struct member for virt_irq, which will be used in future changesets for the implementation of mapping between real and virtual IRQ numbers. This nicely kills off a ton of SBUS and PCI controller PIL assignment code which is no longer necessary. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/pci_sun4v.c')
-rw-r--r--arch/sparc64/kernel/pci_sun4v.c32
1 files changed, 1 insertions, 31 deletions
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c
index 0c089520297..b97c81ba883 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc64/kernel/pci_sun4v.c
@@ -843,38 +843,8 @@ static unsigned int pci_sun4v_irq_build(struct pci_pbm_info *pbm,
unsigned int devino)
{
u32 devhandle = pbm->devhandle;
- int pil;
- pil = 5;
- if (pdev) {
- switch ((pdev->class >> 16) & 0xff) {
- case PCI_BASE_CLASS_STORAGE:
- pil = 5;
- break;
-
- case PCI_BASE_CLASS_NETWORK:
- pil = 6;
- break;
-
- case PCI_BASE_CLASS_DISPLAY:
- pil = 9;
- break;
-
- case PCI_BASE_CLASS_MULTIMEDIA:
- case PCI_BASE_CLASS_MEMORY:
- case PCI_BASE_CLASS_BRIDGE:
- case PCI_BASE_CLASS_SERIAL:
- pil = 10;
- break;
-
- default:
- pil = 5;
- break;
- };
- }
- BUG_ON(PIL_RESERVED(pil));
-
- return sun4v_build_irq(devhandle, devino, pil, IBF_PCI);
+ return sun4v_build_irq(devhandle, devino, IBF_PCI);
}
static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource)