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| author | David Woodhouse <dwmw2@shinybook.infradead.org> | 2005-06-02 16:39:11 +0100 |
|---|---|---|
| committer | David Woodhouse <dwmw2@shinybook.infradead.org> | 2005-06-02 16:39:11 +0100 |
| commit | 1c3f45ab2f7f879ea482501c83899505c31f7539 (patch) | |
| tree | 672465b3b9b3e2e26a8caf74ed64aa6885c52c13 /arch/sparc64/kernel/traps.c | |
| parent | 4bcff1b37e7c3aed914d1ce5b45994adc7dbf455 (diff) | |
| parent | e0d6d71440a3a35c6fc2dde09f8e8d4d7bd44dda (diff) | |
Merge with master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Diffstat (limited to 'arch/sparc64/kernel/traps.c')
| -rw-r--r-- | arch/sparc64/kernel/traps.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c index 56b203a2af6..a9f4596d7c2 100644 --- a/arch/sparc64/kernel/traps.c +++ b/arch/sparc64/kernel/traps.c @@ -421,6 +421,25 @@ asmlinkage void cee_log(unsigned long ce_status, } } +int cheetah_pcache_forced_on; + +void cheetah_enable_pcache(void) +{ + unsigned long dcr; + + printk("CHEETAH: Enabling P-Cache on cpu %d.\n", + smp_processor_id()); + + __asm__ __volatile__("ldxa [%%g0] %1, %0" + : "=r" (dcr) + : "i" (ASI_DCU_CONTROL_REG)); + dcr |= (DCU_PE | DCU_HPE | DCU_SPE | DCU_SL); + __asm__ __volatile__("stxa %0, [%%g0] %1\n\t" + "membar #Sync" + : /* no outputs */ + : "r" (dcr), "i" (ASI_DCU_CONTROL_REG)); +} + /* Cheetah error trap handling. */ static unsigned long ecache_flush_physbase; static unsigned long ecache_flush_linesize; |